From fa1211f69bff82013a10a89298229398da8fab9b Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 23 Jul 2008 00:34:11 +0000 Subject: Enable first-class aggregates support. Remove the GetResultInst instruction. It is still accepted in LLVM assembly and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove support for return instructions with multiple values. These are auto-upgraded to use InsertValueInst instructions. The IRBuilder still accepts multiple-value returns, and auto-upgrades them to InsertValueInst instructions. llvm-svn: 53941 --- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 5 ----- 1 file changed, 5 deletions(-) (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp') diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp index f4d7359..2c585b1 100644 --- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -768,11 +768,6 @@ static void WriteInstruction(const Instruction &I, unsigned InstID, Vals.push_back(VE.getValueID(I.getOperand(1))); Vals.push_back(cast(I).getPredicate()); break; - case Instruction::GetResult: - Code = bitc::FUNC_CODE_INST_GETRESULT; - PushValueAndType(I.getOperand(0), InstID, Vals, VE); - Vals.push_back(cast(I).getIndex()); - break; case Instruction::Ret: { -- cgit v1.1