From 1023ddaf779015a991cc02d4e61fb29efb767327 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Wed, 6 Jul 2022 10:57:24 -0400 Subject: [LLVM] Add the support for fmax and fmin in atomicrmw instruction This patch adds the support for `fmax` and `fmin` operations in `atomicrmw` instruction. For now (at least in this patch), the instruction will be expanded to CAS loop. There are already a couple of targets supporting the feature. I'll create another patch(es) to enable them accordingly. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D127041 --- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp') diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp index 7be440a..47c79cdb 100644 --- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp @@ -1243,6 +1243,8 @@ static AtomicRMWInst::BinOp getDecodedRMWOperation(unsigned Val) { case bitc::RMW_UMIN: return AtomicRMWInst::UMin; case bitc::RMW_FADD: return AtomicRMWInst::FAdd; case bitc::RMW_FSUB: return AtomicRMWInst::FSub; + case bitc::RMW_FMAX: return AtomicRMWInst::FMax; + case bitc::RMW_FMIN: return AtomicRMWInst::FMin; } } -- cgit v1.1