From 2dbbd64cb7b3340ca692eb75e789048196b9d33b Mon Sep 17 00:00:00 2001 From: Max Kazantsev Date: Mon, 6 Aug 2018 11:14:18 +0000 Subject: Re-enable "[ValueTracking] Teach isKnownNonNullFromDominatingCondition about AND" The patch was reverted because of bug detected by sanitizer. The bug is fixed, respective tests added. Differential Revision: https://reviews.llvm.org/D50172 llvm-svn: 339005 --- llvm/lib/Analysis/ValueTracking.cpp | 43 ++++++++++++++++++++++++++++--------- 1 file changed, 33 insertions(+), 10 deletions(-) (limited to 'llvm/lib/Analysis/ValueTracking.cpp') diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp index edd46c5..afaa800 100644 --- a/llvm/lib/Analysis/ValueTracking.cpp +++ b/llvm/lib/Analysis/ValueTracking.cpp @@ -1860,19 +1860,42 @@ static bool isKnownNonNullFromDominatingCondition(const Value *V, (Pred != ICmpInst::ICMP_EQ && Pred != ICmpInst::ICMP_NE)) continue; + SmallVector WorkList; + SmallPtrSet Visited; for (auto *CmpU : U->users()) { - if (const BranchInst *BI = dyn_cast(CmpU)) { - assert(BI->isConditional() && "uses a comparison!"); + assert(WorkList.empty() && "Should be!"); + if (Visited.insert(CmpU).second) + WorkList.push_back(CmpU); + + while (!WorkList.empty()) { + auto *Curr = WorkList.pop_back_val(); + + // If a user is an AND, add all its users to the work list. We only + // propagate "pred != null" condition through AND because it is only + // correct to assume that all conditions of AND are met in true branch. + // TODO: Support similar logic of OR and EQ predicate? + if (Pred == ICmpInst::ICMP_NE) + if (auto *BO = dyn_cast(Curr)) + if (BO->getOpcode() == Instruction::And) { + for (auto *BOU : BO->users()) + if (Visited.insert(BOU).second) + WorkList.push_back(BOU); + continue; + } + + if (const BranchInst *BI = dyn_cast(Curr)) { + assert(BI->isConditional() && "uses a comparison!"); - BasicBlock *NonNullSuccessor = - BI->getSuccessor(Pred == ICmpInst::ICMP_EQ ? 1 : 0); - BasicBlockEdge Edge(BI->getParent(), NonNullSuccessor); - if (Edge.isSingleEdge() && DT->dominates(Edge, CtxI->getParent())) + BasicBlock *NonNullSuccessor = + BI->getSuccessor(Pred == ICmpInst::ICMP_EQ ? 1 : 0); + BasicBlockEdge Edge(BI->getParent(), NonNullSuccessor); + if (Edge.isSingleEdge() && DT->dominates(Edge, CtxI->getParent())) + return true; + } else if (Pred == ICmpInst::ICMP_NE && + match(Curr, m_Intrinsic()) && + DT->dominates(cast(Curr), CtxI)) { return true; - } else if (Pred == ICmpInst::ICMP_NE && - match(CmpU, m_Intrinsic()) && - DT->dominates(cast(CmpU), CtxI)) { - return true; + } } } } -- cgit v1.1