aboutsummaryrefslogtreecommitdiff
path: root/mlir/test
AgeCommit message (Expand)AuthorFilesLines
2024-09-20[mlir][AMDGPU] New gfx12 barrier instructions and update lowering LDSBarrierO...Daniel Hernandez-Juarez3-0/+47
2024-09-20[MLIR][AMDGPU] Add ability to do 16-bit Memset with HIP APIs (#108587)Umang Yadav1-0/+17
2024-09-20Revert "[clang][flang][mlir] Support -frecord-command-line option (#102975)"David Spickett2-12/+0
2024-09-20[mlir][affine] Verify `map` of affineMaxMinOp has at least one result (#108699)Longsheng Mou1-0/+32
2024-09-20[mlir][tosa] Add missing verifier check for `tosa.reshape` (#109301)Longsheng Mou1-0/+16
2024-09-20[mlir] [LLVM IR] Introduce VaArgOp (#109260)Chuanqi Xu3-7/+14
2024-09-20[mlir] Fix disagreement between document and test(NFC) (#109257)csstormq1-4/+5
2024-09-19[clang][flang][mlir] Support -frecord-command-line option (#102975)Tarun Prabhu2-0/+12
2024-09-19[mlir][vector][xegpu] Vector to XeGPU conversion pass (#107419)Adam Siemieniuk2-0/+359
2024-09-19[mlir][linalg] Vectorisation of tensor.extract - dynamic shapes (#100582)Andrzej Warzyński2-40/+98
2024-09-19[mlir][Vector] Verify that masked ops implement MaskableOpInterface (#108123)Diego Caballero2-5/+15
2024-09-19[mlir][vector] Relax strides check for 1-element vector load/stores (#108998)Ivan Butygin1-0/+20
2024-09-19[mlir][LLVMIR] Add more vector predication intrinsic ops (#107663)Jianjian Guan3-0/+47
2024-09-18[mlir][gpu] Disjoint patterns for lowering clustered subgroup reduce (#109158)Andrea Faulds1-1/+4
2024-09-18[MLIR] Reuse the path to runner_utils libraries (#108579)Tulio Magno Quites Machado Filho1-5/+11
2024-09-18[MLIR] [Python] align python ir printing with mlir-print-ir-after-all (#107522)Bimo1-2/+28
2024-09-17[mlir] [tblgen-to-irdl] Add types to tblgen-to-irdl script (#108558)Alex Rice2-12/+17
2024-09-17[MLIR][IR] Fix InProgressAliasInfo init for non-alias (#109013)Billy Zhu1-7/+20
2024-09-17[mlir][gpu] Rename two misspelled pattern population functions (#109015)Andrea Faulds1-4/+4
2024-09-17[mlir][GPU] block_id has the grid size as its rangeBenjamin Kramer1-0/+19
2024-09-16[MLIR] Add f6E2M3FN type (#107999)Sergey Kozub3-0/+16
2024-09-16[mlir] Allow multi-result ops in reshape fusion (#108576)Max1911-18/+24
2024-09-14[mlir][transforms] Skip `RemoveDeadValues` for function declaration (#108221)Longsheng Mou1-0/+5
2024-09-13[MLIR][TOSA] Add --tosa-reduce-transposes pass (#108260)Arteen Abrishami1-0/+649
2024-09-13[mlir][sparse] fix bug with all-dense assembler (#108615)Aart Bik6-6/+115
2024-09-13[mlir][mesh] Introduce `DialectInlinerInterface` for Mesh dialect (#108297)Matteo Franciolini1-0/+15
2024-09-13[mlir][GPU] Plumb range information through the NVVM lowerings (#107659)Krzysztof Drewniak3-5/+37
2024-09-13Add missing FillOp to winograd lowering (#108181)Thomas Preud'homme3-96/+170
2024-09-13[MLIR][OpenMP] Improve assemblyFormat handling for clause-based ops (#108023)Sergio Afonso5-41/+71
2024-09-12[CMake] Add missing dependency (#108461)Erick Ochoa1-0/+4
2024-09-12[mlir][AMDGPU] Remove an old bf16 workaround (#108409)Krzysztof Drewniak2-9/+11
2024-09-12[MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (#108302)Nirvedh Meshram1-0/+62
2024-09-12[mlir][AMDGPU] Enable emulating vector buffer_atomic_fadd on gfx11 (#108312)Krzysztof Drewniak2-0/+34
2024-09-12[mlir][LLVM] Refactor how range() annotations are handled for ROCDL intrinsic...Krzysztof Drewniak2-7/+9
2024-09-12[mlir][SPIRV] Make test case more robust (#108388)Matthias Springer1-2/+2
2024-09-12[mlir][Transforms] Dialect conversion: Align handling of dropped values (#106...Matthias Springer1-2/+2
2024-09-11[mlir][TilingInterface] Avoid looking at operands for getting slices to conti...MaheshRavishankar2-5/+52
2024-09-12[mlir][scf] Extend consumer fuse to single nested `scf.for` (#108318)Yun-Fly1-7/+70
2024-09-11Revert "[mlir][scf] Extend consumer fuse to single nested `scf.for` (#94190)"Kazu Hirata1-70/+7
2024-09-12[mlir][scf] Extend consumer fuse to single nested `scf.for` (#94190)Yun-Fly1-7/+70
2024-09-12[mlir][Tosa] Fix attr type of out_shape for `tosa.transpose_conv2d` (#108041)Longsheng Mou1-0/+9
2024-09-11[mlir][AMDGPU] Support vector<2xf16> inputs to buffer atomic fadd (#108286)Krzysztof Drewniak1-0/+11
2024-09-11Revert "[mlir][AMDGPU] Support vector<2xf16> inputs to buffer atomic fadd (#1...Krzysztof Drewniak1-11/+0
2024-09-11[mlir][AMDGPU] Support vector<2xf16> inputs to buffer atomic fadd (#108238)Krzysztof Drewniak1-0/+11
2024-09-11[MLIR][TOSA] add additional verification to TOSA (#108133)Arteen Abrishami5-19/+87
2024-09-11[mlir] [tblgen-to-irdl] Refactor tblgen-to-irdl script and support more types...Alex Rice2-7/+53
2024-09-11[MLIR][Python] Python binding support for IntegerSet attribute (#107640)Amy Wang1-0/+18
2024-09-11[MLIR][OpenMP] Automate operand structure definition (#99508)Sergio Afonso1-0/+86
2024-09-11[mlir][vector] Support for extracting 1-element vectors in VectorExtractOpCon...Longsheng Mou1-0/+24
2024-09-11[mlir] Add dependent TensorDialect to ConvertVectorToLLVM pass (#108045)Longsheng Mou1-0/+10
generated by cgit v1.2.3 (git 2.39.1) at 2026-05-21 06:27:53 +0000