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2016-09-11[SimplifyCFG] Be even more conservative in SinkThenElseCodeToEndJames Molloy3-29/+44
This should *actually* fix PR30244. This cranks up the workaround for PR30188 so that we never sink loads or stores of allocas. The idea is that these should be removed by SROA/Mem2Reg, and any movement of them may well confuse SROA or just cause unwanted code churn. It's not ideal that the midend should be crippled like this, but that unwanted churn can really cause significant regressions in important workloads (tsan). llvm-svn: 281162
2016-09-11[AArch64] Fixup test after r281160James Molloy1-1/+1
How I missed this locally is beyond me. I suspect llc didn't recompile. This is just changing the CHECK line back to what it was before r280364. llvm-svn: 281161
2016-09-11[SimplifyCFG] Harden up the profitability heuristic for block splitting ↵James Molloy2-8/+72
during sinking Exposed by PR30244, we will split a block currently if we think we can sink at least one instruction. However this isn't right - the reason we split predecessors is so that we can sink instructions that otherwise couldn't be sunk because it isn't safe to do so - stores, for example. So, change the heuristic to only split if it thinks it can sink at least one non-speculatable instruction. Should fix PR30244. llvm-svn: 281160
2016-09-11[CodeGen] Make the TwoAddressInstructionPass check if the instruction is ↵Craig Topper1-1/+4
commutable before calling findCommutedOpIndices for every operand. Also make sure the operand is a register before each call to save some work on commutable instructions that might have an operand. llvm-svn: 281158
2016-09-11[AVX-512] Add test cases to demonstrate opportunities for commuting ↵Craig Topper1-0/+529
vpternlog. Commuting will be added in a future commit. llvm-svn: 281157
2016-09-11[AVX-512] Add VPTERNLOG to load folding tables.Craig Topper2-0/+36
llvm-svn: 281156
2016-09-11[X86] Side effecting asm in AVX512 integer stack folding test should return ↵Craig Topper1-20/+20
2 x i64 not 8 x i64. llvm-svn: 281155
2016-09-11[X86] Make a helper method into a static function local to the cpp file.Craig Topper2-11/+10
llvm-svn: 281154
2016-09-11Add handling of !invariant.load to PropagateMetadata.Justin Lebar2-6/+23
Summary: This will let e.g. the load/store vectorizer propagate this metadata appropriately. Reviewers: arsenm Subscribers: tra, jholewinski, hfinkel, mzolotukhin Differential Revision: https://reviews.llvm.org/D23479 llvm-svn: 281153
2016-09-11[NVPTX] Use ldg for explicitly invariant loads.Justin Lebar2-13/+49
Summary: With this change (plus some changes to prevent !invariant from being clobbered within llvm), clang will be able to model the __ldg CUDA builtin as an invariant load, rather than as a target-specific llvm intrinsic. This will let the optimizer play with these loads -- specifically, we should be able to vectorize them in the load-store vectorizer. Reviewers: tra Subscribers: jholewinski, hfinkel, llvm-commits, chandlerc Differential Revision: https://reviews.llvm.org/D23477 llvm-svn: 281152
2016-09-11[CodeGen] Split out the notions of MI invariance and MI dereferenceability.Justin Lebar24-70/+112
Summary: An IR load can be invariant, dereferenceable, neither, or both. But currently, MI's notion of invariance is IR-invariant && IR-dereferenceable. This patch splits up the notions of invariance and dereferenceability at the MI level. It's NFC, so adds some probably-unnecessary "is-dereferenceable" checks, which we can remove later if desired. Reviewers: chandlerc, tstellarAMD Subscribers: jholewinski, arsenm, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D23371 llvm-svn: 281151
2016-09-10MCInstrDesc: Flags (uint64_t) was checked using (1 << MCID::XYZ), but this Sjoerd Meijer1-32/+32
should have been (1ULL << MCID::XYZ). Currently this works because enum Flag has 31 values, but extending it will result in a compile warnings/errors. This was part of the accepted patch in https://reviews.llvm.org/D23601, but it was suggested to apply this first as a separate patch. llvm-svn: 281149
2016-09-10It should also be legal to pass a swifterror parameter to a call as a swifterrorArnold Schwaighofer3-8/+82
argument. rdar://28233388 llvm-svn: 281147
2016-09-10[llvm-cov] Move the 'jump to first unexecuted line' linkVedant Kumar7-39/+36
Having it in the same row as the source name is jarring. Move it next to the "Source" column label. llvm-svn: 281146
2016-09-10[llvm-cov] Minor visual tweaks for html reportsVedant Kumar6-76/+35
- Change the location of the 'Region Coverage' column. - Use less css and text for some labels. llvm-svn: 281145
2016-09-10InstCombine: Don't combine loads/stores from swifterror to a new typeArnold Schwaighofer3-0/+41
This generates invalid IR: the only users of swifterror can be call arguments, loads, and stores. rdar://28242257 llvm-svn: 281144
2016-09-10Add an isSwiftError predicate to ValueArnold Schwaighofer2-0/+16
llvm-svn: 281143
2016-09-10ADT: Move ilist_node_access to ilist_detail::NodeAccess...Duncan P. N. Exon Smith5-29/+60
... and make a few ilist-internal API changes, in preparation for changing how ilist_node is templated. The only effect for ilist users should be changing the friend target from llvm::ilist_node_access to llvm::ilist_detail::NodeAccess (which is only necessary when they inherit privately from ilist_node). - Split out SpecificNodeAccess, which has overloads of getNodePtr and getValuePtr that are untemplated. - Use more typedefs to prevent more changes later. - Force inheritance to use *NodeAccess (to emphasize that ilist *users* shouldn't be doing this). There should be no functionality change here. llvm-svn: 281142
2016-09-10ADT: Use typedefs for ilist_base and ilist_node_base, NFCDuncan P. N. Exon Smith3-42/+48
This is a prep commit to minimize changes in a follow-up that is adding a template parameter to ilist_node_base and ilist_base. llvm-svn: 281141
2016-09-10[InstCombine] clean up foldICmpBinOpEqualityWithConstant / ↵Sanjay Patel1-59/+56
foldICmpIntrinsicWithConstant ; NFC 1. Rename variables to be consistent with related/preceding code (may want to reorganize). 2. Fix comments/formatting. llvm-svn: 281140
2016-09-10[InstCombine] rename and reorganize some icmp folding functions; NFCSanjay Patel2-24/+23
Everything under foldICmpInstWithConstant() should now be working for splat vectors via m_APInt matchers. Ie, I've removed all of the FIXMEs that I added while cleaning that section up. Note that not all of the associated FIXMEs in the regression tests are gone though, because some of the tests require earlier folds that are still scalar-only. llvm-svn: 281139
2016-09-10We also need to pass swifterror in R12 under swiftcc not only under cccArnold Schwaighofer2-0/+25
rdar://28190687 llvm-svn: 281138
2016-09-10[AMDGPU] Refactor MUBUF/MTBUF instructionsValery Pykhtin6-1168/+1306
Differential revision: https://reviews.llvm.org/D24295 llvm-svn: 281137
2016-09-10[gold/LTO] Add test case for r281134Teresa Johnson1-0/+10
Add test case that was supposed to go in with r281134. llvm-svn: 281135
2016-09-10[LTO] Handle null GV in Symbol objectTeresa Johnson1-0/+2
Similar to other Symbol methods, have Symbol::getComdat handle a null GV gracefully. Fixes PR30326. llvm-svn: 281134
2016-09-10[WebAssembly] Fix typos in commentsHeejin Ahn1-11/+14
llvm-svn: 281131
2016-09-10[libFuzzer] print a failed-merge warning only in the merge modeKostya Serebryany1-0/+1
llvm-svn: 281130
2016-09-10AMDGPU: Implement is{LoadFrom|StoreTo}FrameIndexMatt Arsenault6-21/+90
llvm-svn: 281128
2016-09-10AMDGPU: Fix scheduling info for spill pseudosMatt Arsenault1-2/+3
These defaulted to Write32Bit. I don't think this actually matters since these don't exist during scheduling. llvm-svn: 281127
2016-09-10[asan] Add flag to allow lifetime analysis of problematic allocasVitaly Buka2-6/+15
Summary: Could be useful for comparison when we suspect that alloca was skipped because of this. Reviewers: eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D24437 llvm-svn: 281126
2016-09-10[CodeGen] Rename MachineInstr::isInvariantLoad to ↵Justin Lebar9-22/+24
isDereferenceableInvariantLoad. NFC Summary: I want to separate out the notions of invariance and dereferenceability at the MI level, so that they correspond to the equivalent concepts at the IR level. (Currently an MI load is MI-invariant iff it's IR-invariant and IR-dereferenceable.) First step is renaming this function. Reviewers: chandlerc Subscribers: MatzeB, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D23370 llvm-svn: 281125
2016-09-10[libFuzzer] don't print help for internal flags Kostya Serebryany2-0/+3
llvm-svn: 281124
2016-09-10[libFuzzer] print a visible message if merge fails due to a crash Kostya Serebryany3-0/+24
llvm-svn: 281122
2016-09-10Remove dead code in the SelectionDAG headers (NFC)Vedant Kumar2-13/+0
I tested this with "ninja check-llvm-codegen" on a Release build with all architectures enabled, and again with a Debug build on x86. Found with llvm-cov. Differential Revision: https://reviews.llvm.org/D24433 llvm-svn: 281120
2016-09-09AMDGPU: Fix immediate folding logic when shrinking instructionsMatt Arsenault10-39/+43
If the literal is being folded into src0, it doesn't matter if it's an SGPR because it's being replaced with the literal. Also fixes initially selecting 32-bit versions of some instructions which also confused commuting. llvm-svn: 281117
2016-09-09Inliner: Don't mark swifterror allocas with lifetime markersArnold Schwaighofer2-0/+20
This would create a bitcast use which fails the verifier: swifterror values may only be used by loads, stores, and as function arguments. rdar://28233244 llvm-svn: 281114
2016-09-09X86: Fold tail calls into conditional branches also for 64-bit (PR26302)Hans Wennborg6-15/+44
This extends the optimization in r280832 to also work for 64-bit. The only quirk is that we can't do this for 64-bit Windows (yet). Differential Revision: https://reviews.llvm.org/D24423 llvm-svn: 281113
2016-09-09AMDGPU: Run LoadStoreVectorizer pass by defaultMatt Arsenault9-24/+25
llvm-svn: 281112
2016-09-09[libFuzzer] use sizeof() in tests instead of 4 and 8Kostya Serebryany2-6/+6
llvm-svn: 281111
2016-09-09LSV: Fix incorrectly increasing alignmentMatt Arsenault2-18/+145
If the unaligned access has a dynamic offset, it may be odd which would make the adjusted alignment incorrect to use. llvm-svn: 281110
2016-09-09[gold] Test that we handle invalid directory correctly.Davide Italiano2-0/+9
I had this test sitting around for a while but always forgot to commit. Rafael reviewed it a while ago. Differential Revision: https://reviews.llvm.org/D19207 llvm-svn: 281109
2016-09-09[InstCombine] use m_APInt to allow icmp ult X, C folds for splat constant ↵Sanjay Patel5-18/+27
vectors llvm-svn: 281107
2016-09-09[libFuzzer] one more puzzle for value profileKostya Serebryany3-0/+25
llvm-svn: 281106
2016-09-09[X86][XOP] Fix VPERMIL2PD mask creation on 32-bit targetsSimon Pilgrim2-73/+160
Use getConstVector helper to correctly create v2i64/v4i64 constants on 32-bit targets llvm-svn: 281105
2016-09-09[Hexagon] Fix disassembler crash after r279255Krzysztof Parzyszek2-0/+10
When p0 was added as an explicit operand to the duplex subinstructions, the disassembler was not updated to reflect this. llvm-svn: 281104
2016-09-09[X86] Regenerate test. NFC.Michael Kuperstein1-3/+9
llvm-svn: 281099
2016-09-09Enable in-tree builds of parallel-libs.Justin Lebar1-1/+3
Summary: parallel-libs needs its own changes to make this work; these are just the LLVM changes. Reviewers: jhen Subscribers: llvm-commits, beanz, jprice Differential Revision: https://reviews.llvm.org/D24402 llvm-svn: 281097
2016-09-09Create phi nodes for swifterror values at the end of the phi instructions listArnold Schwaighofer2-1/+20
ISel makes assumption about the order of phi nodes. rdar://28190150 llvm-svn: 281095
2016-09-09[NVPTX] Implement llvm.fabs.f32, llvm.max.f32, etc.Justin Lebar4-17/+394
Summary: Previously these only worked via NVPTX-specific intrinsics. This change will allow us to convert these target-specific intrinsics into the general LLVM versions, allowing existing LLVM passes to reason about their behavior. It also gets us some minor codegen improvements as-is, from situations where we canonicalize code into one of these llvm intrinsics. Reviewers: majnemer Subscribers: llvm-commits, jholewinski, tra Differential Revision: https://reviews.llvm.org/D24300 llvm-svn: 281092
2016-09-09ARM: move the builtins libcall CC setupSaleem Abdulrasool3-166/+171
Move the target specific setup into the target specific lowering setup. As pointed out by Anton, the initial change was moving this too high up the stack resulting in a violation of the layering (the target generic code path setup target specific bits). Sink this into the ARM specific setup. NFC. llvm-svn: 281088
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