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2026-01-13[CodeGen] Enhance createFrom for sub-reg aware cloningusers/cdevadas/enhance-createFrom-functionChristudasan Devadasan2-3/+14
2026-01-13suggestions incorporated.users/cdevadas/make-AMDGPURewriteAGPRCopyMFMA-subreg-reload-awareChristudasan Devadasan1-2/+2
2026-01-13[AMDGPU] Make AMDGPURewriteAGPRCopyMFMA aware of subreg reloadChristudasan Devadasan3-1/+54
2026-01-13fixed a comment.users/cdevadas/make-getNumSubRegsForSpillOp-member-functionChristudasan Devadasan1-1/+1
2026-01-13moved the implementation to SIInstrInfo.Christudasan Devadasan4-151/+150
2026-01-13[AMDGPU] Make getNumSubRegsForSpillOp externally available (NFC).Christudasan Devadasan2-3/+5
2026-01-13incorporated review comments.users/cdevadas/add-spill-offset-to-sgpr-spill-pseudosChristudasan Devadasan1-3/+3
2026-01-13[AMDGPU] Introduce Offset field in SGPR spill PseudosChristudasan Devadasan41-165/+167
2026-01-13[CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subr...Christudasan Devadasan48-53/+63
2026-01-13[LV][NFC] Follow-up fix for #173262 (#175513)Mel Chen1-7/+6
2026-01-13[UniformityAnalysis] Jump over reducible cycles when locating join blocks (#1...Sameer Sahasrabuddhe2-24/+78
2026-01-12[RISCV] Add the missing SEW search table field to vector FMA instructions (#1...Min-Yih Hsu4-210/+210
2026-01-12[cmake] Make CMAKE_BUILD_TYPE=Release the default (#174520)Reid Kleckner1-8/+3
2026-01-12Remove cleanup of incorrect output in test dir (#171256)Mircea Trofin1-1/+0
2026-01-12[profcheck] Fix encoding of 0 loopEstimatedTrip count (#174896)Mircea Trofin4-9/+12
2026-01-13[AMDGPU]Add specific instruction feature for multicast load (#175503)Shoreshen4-3/+17
2026-01-13[RISCV] Adjust base cost for Xqcilo loads/stores in RISCVMakeCompressible (#1...Sudharsan Veeravalli2-12/+86
2026-01-13[RISCV] Use LD_RV32/SD_RV32 for spills and reloads when Zilsd is enabled (#15...Sudharsan Veeravalli3-42/+385
2026-01-13[Clang][AMDGPU] Get correct nullptr value for AS3 and AS5 (#175610)Shilei Tian1-0/+15
2026-01-13[llvm-jitlink] Remove flaky testcase. (#175680)Lang Hames1-41/+0
2026-01-12[llvm][flang] Silence warning, resume -Werror builds of flang (#175053)Peter Klausler1-0/+2
2026-01-12[llvm][RISCV] Suppress unused `IsMulH` warning. (#175653)Chenguang Wang1-2/+3
2026-01-12[X86][NewPM] Port x86-pre-tile-config (#175649)Aiden Grossman4-23/+57
2026-01-12KnownFPClass: Make LLVM_ABI checker happy (#175654)Matt Arsenault1-1/+1
2026-01-12[VPlan] Merge Select with previous cases in ::computeCost (NFC).Florian Hahn1-1/+0
2026-01-12[X86][NewPM] Port x86-tile-config (#175647)Aiden Grossman5-19/+46
2026-01-12[utils][git] Skip subscribers for PRs labeled as skip-precommit-approval (#17...Petr Hosek1-0/+8
2026-01-12[AMDGPU] Add DS loop waitcnt optimization for GFX12+ (#172728)hidekisaito3-61/+477
2026-01-12[gn build] Port dcf8ae80289fLLVM GN Syncbot1-0/+1
2026-01-12[gn build] Port c6e0e7d4c0e6LLVM GN Syncbot1-1/+0
2026-01-12[gn build] Port 67601a43b57aLLVM GN Syncbot1-0/+1
2026-01-12[gn build] Port 5c4324326d77LLVM GN Syncbot1-0/+1
2026-01-12[gn build] Port 564f2be43f81LLVM GN Syncbot1-0/+1
2026-01-12[gn build] Port 27cbe6e8f6c7LLVM GN Syncbot1-0/+1
2026-01-12[SelectionDAGISel] Remove unused opcodes. NFC (#175621)Craig Topper3-28/+25
2026-01-12[IR][InstCombine] Fix O(n^2) complexity in SliceUpIllegalIntegerPHI (#175468)Kirill Pertsev3-6/+15
2026-01-12[X86][NewPM] Port x86-fixup-vector-constants (#175622)Aiden Grossman4-20/+49
2026-01-12[AMDGPU] Generate checks for a few more MC tests (#175640)Jay Foad9-25862/+25871
2026-01-12[VPlan] Cache other type for VPWidenRecipe with Select opcode (NFC).Florian Hahn1-2/+8
2026-01-12[X86][NewPM] Port x86-suppress-apx-for-relocation (#175634)Aiden Grossman5-14/+38
2026-01-12[VectorCombine] foldPermuteOfIntrinsic - support multiple uses of shuffled op...Julian Pokrovsky2-2/+41
2026-01-12[NFC][LLVM] Adopt ListSeparator/interleaved in more places (#172909)Rahul Joshi20-178/+84
2026-01-12[gn] Skip most interpreter tests for nowNico Weber1-0/+4
2026-01-12[gn] port 19317ad1d91eNico Weber1-0/+1
2026-01-12[X86][NewPM] Port x86-lower-tile-copy (#175625)Aiden Grossman4-14/+32
2026-01-12AMDGPU: Move test to correct placeMatt Arsenault3-0/+0
2026-01-12[X86][NewPM] Port x86-fixup-setcc (#175609)Aiden Grossman5-21/+34
2026-01-12[VPlan] Check for store group once in VPInterleaveBase() (NFC)Florian Hahn1-9/+10
2026-01-12[AMDGPU]: Rewrite mbcnt_lo/mbcnt_hi to work item ID where applicable (#160496)Teja Alaghari4-0/+496
2026-01-12[DirectX] Update DXILValueEnumerator for the new SwitchInst format (#174672)Deric C.2-0/+47
generated by cgit v1.2.3 (git 2.39.1) at 2026-05-17 13:13:07 +0000