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2024-09-20[ARM] Use MCRegister in 2 functions in ARMTargetStreamer. NFCCraig Topper4-22/+23
2024-09-21[AMDGPU][NewPM] Port SILowerSGPRSpills to NPM (#108934)Akshat Oke8-20/+75
2024-09-20[Parallel] Revert sequential task changesFangrui Song3-50/+13
https://reviews.llvm.org/D148728 introduced `bool Sequential` to unify `execute` and the old `spawn` without argument. However, sequential tasks might be executed by any worker thread (non-deterministic), leading to non-determinism output for ld.lld -z nocombreloc (see https://reviews.llvm.org/D133003). In addition, the extra member variables have overhead. This sequential task has only been used for lld parallel relocation scanning. This patch restores the behavior before https://reviews.llvm.org/D148728 . Fix #105958 Pull Request: https://github.com/llvm/llvm-project/pull/109084
2024-09-20[NFC] [HWASan] pull removeFnAttributes into function (#109488)Florian Mayer1-34/+43
2024-09-20[MC] Remove unneeded null getFragment() check. NFCFangrui Song1-5/+2
Follow-up to d620ba0344c719da51b6067975439ed84024b1ac.
2024-09-20[RISCV] Avoid calling isSymbolRefDifferenceFullyResolvedImpl. NFCFangrui Song2-3/+16
This member function is supposed to be private to MC. Also add an ifunc test.
2024-09-20[SandboxVec][DAG] Implement extend(ArrayRef) (#109493)vporpo3-10/+20
This builds the DAG from an ArrayRef of Instructions.
2024-09-20[Inliner] Fix bug where attributes are propagated incorrectly (#109347)goldsteinn3-4/+77
- **[Inliner] Add tests for incorrect propagation of return attrs; NFC** - **[Inliner] Fix bug where attributes are propagated incorrectly** The bug stems from the fact that we assume the new (inlined) callsite is calling the same function as the original (callee) callsite. While this is typically the case, since `VMap` simplifies the new instructions, callee intrinsics callsites can end up not corresponding with the same function. This can lead to buggy propagation.
2024-09-20[NFC] [HWASan] fix LLVM style guide violationsFlorian Mayer1-4/+5
2024-09-20[SandboxVec][InstrInterval] Add ArrayRef constructor (#109357)vporpo2-0/+33
The new constructor creates an InstrInterval from an ArrayRef<Instruction *>. This patch also adds top() and bottom() getters.
2024-09-20[SandboxIR] Implement ConstantPtrAuth (#109315)vporpo4-0/+134
This patch implements sandboxir::ConstantPtrAuth mirroring llvm::ConstantPtrAuth
2024-09-20Revert "[Coroutines] ABI Objects to improve code separation between ↵Thurston Dang7-208/+69
different ABIs, users and utilities. (#109338)" This reverts commit 2e414799d0ad511cd7999895014a2cae2ea5e3e3. Reason: buildbot breakage (https://lab.llvm.org/buildbot/#/builders/51/builds/4105) (This was the only new CL.) /home/b/sanitizer-aarch64-linux/build/llvm-project/llvm/lib/Transforms/Coroutines/ABI.h:71:31: error: 'llvm::coro::AsyncABI' has virtual functions but non-virtual destructor [-Werror,-Wnon-virtual-dtor] 71 | class LLVM_LIBRARY_VISIBILITY AsyncABI : public BaseABI { etc.
2024-09-20[AA] Take account of C++23's stricter rules for forward declarations (NFC) ↵Jonathan Tanner2-1/+3
(#109416) C++23 has stricter rules for forward declarations around std::unique_ptr, this means that the inline declaration of the constructor was failing under clang in C++23 mode, switching to an out-of-line definition of the constructor fixes this. This was fairly major impact as it blocked inclusion of a lot of headers under clang in C++23 mode. Fixes #106597.
2024-09-20[Coroutines] ABI Objects to improve code separation between different ABIs, ↵Tyler Nowicki7-69/+208
users and utilities. (#109338) * Adds an ABI object class hierarchy to implement the coroutine ABIs (Switch, Asyc, and Retcon{Once}) * The ABI object improves the separation of the code related to users, ABIs and utilities. * No code changes are required by any existing users. * Each ABI overrides delegate methods for initialization, building the coroutine frame and splitting the coroutine, other methods may be added later. * CoroSplit invokes a generator lambda to instantiate the ABI object and calls the ABI object to carry out its primary operations. See RFC for more info: https://discourse.llvm.org/t/rfc-abi-objects-for-coroutines/81057
2024-09-20[memprof] Remove RawMemProfReader.h (#109446)Kazu Hirata1-19/+0
It's been more than five months since RawMemProfReader.h became a "forwarding" header with: commit 2bede6873dbe7021b306d3e5bec59d0fba2dd26c Author: Kazu Hirata <kazu@google.com> Date: Wed Apr 10 22:03:20 2024 -0700 This patch removes the empty header.
2024-09-20[SPIR-V] Enable `spirv-sim` lit substitution unconditionally (#109451)Justin Bogner1-7/+8
The uses of spirv-sim aren't gated by LLVM_INCLUDE_SPIRV_TOOLS_TESTS, so the substitution shouldn't be gated either. Fixes tests after #107408
2024-09-20[LLVM][TableGen] Change RegisterInfoEmitter to use const RecordKeeper (#109237)Rahul Joshi1-16/+13
Change RegisterInfoEmitter to use const RecordKeeper. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-20[AMDGPU][True16] vop1 pk instructions profile update (#109228)Brox Chen1-2/+8
Remove dependency on VOPProfileI2F. This is to get ready for the upcoming VOP3 true16 profile update. No test file changed.
2024-09-20[MC] Use MCRegister and remove implicit casts from MCRegister to unsigned. NFCCraig Topper9-30/+30
2024-09-20[gn build] Port fb7849537601LLVM GN Syncbot1-0/+1
2024-09-20[FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (#108024)Alexandros Lamprineas2-5/+3
Originally I tried spliting these features in the compiler with https://github.com/llvm/llvm-project/pull/101712, but we decided to lump those features in the ACLE specification (see https://github.com/ARM-software/acle/pull/346). Since there are no hardware implementations out there which implement ls64 without ls64_v or ls64_accdata, this shouldn't be a regression for feature detection.
2024-09-20[RISCV] Add coverage for <N x i1> vp.strided.loadPhilip Reames1-0/+12
These are currently scalarized, and I need something to exercise <N x i1> scalarization costing. We should probably consider adding a buildvector intrinsic for this purpose.
2024-09-20[llvm] Don't call raw_string_ostream::flush() (NFC)Youngsuk Kim19-22/+0
Don't call raw_string_ostream::flush(), which is essentially a no-op. As specified in the docs, raw_string_ostream is always unbuffered. ( 65b13610a5226b84889b923bae884ba395ad084d for further reference )
2024-09-20[RISCV][TTI] Reduce cost of a build_vector pattern (#108419)Philip Reames14-434/+568
This change is actually two related changes, but they're very hard to meaningfully separate as the second balances the first, and yet doesn't do much good on it's own. First, we can reduce the cost of a build_vector pattern. Our current costing for this defers to generic insertelement costing which isn't unreasonable, but also isn't correct. While inserting N elements requires N-1 slides and N vmv.s.x, doing the full build_vector only requires N vslide1down. (Note there are other cases that our build vector lowering can do more cheaply, this is simply the easiest upper bound which appears to be "good enough" for SLP costing purposes.) Second, we need to tell SLP that calls don't preserve vector registers. Without this, SLP will vectorize scalar code which performs e.g. 4 x float @exp calls as two <2 x float> @exp intrinsic calls. Oddly, the costing works out that this is in fact the optimal choice - except that we don't actually have a <2 x float> @exp, and unroll during DAG. This would be fine (or at least cost neutral) except that the libcall for the scalar @exp blows all vector registers. So the net effect is we added a bunch of spills that SLP had no idea about. Thankfully, AArch64 has a similiar problem, and has taught SLP how to reason about spill cost once the right TTI hook is implemented. Now, for some implications... The SLP solution for spill costing has some inaccuracies. In particular, it basically just guesses whether a intrinsic will be lowered to a call or not, and can be wrong in both directions. It also has no mechanism to differentiate on calling convention. This has the effect of making partial vectorization (i.e. starting in scalar) more profitable. In practice, the major effect of this is to make it more like SLP will vectorize part of a tree in an intersecting forrest, and then vectorize the remaining tree once those uses have been removed. This has the effect of biasing us slightly away from strided, or indexed loads during vectorization - because the scalar cost is more accurately modeled, and these instructions look relevatively less profitable.
2024-09-20Revert "[gn build] Port 64972834c193"Nico Weber1-11/+0
This reverts commit 98cf6560ab6df885b6e21463f6a0a1fa5cea1eea. 64972834c193 was reverted in 9c5ad62e7440
2024-09-20[AMDGPU][True16][MC] true16 for more VOP1 instructions (#108412)Brox Chen29-2872/+6207
Support true16 and fake16 format for more VOP1 instructions in MC This patch updates the true16 and fake16 vop_profile for the following instructions and update the asm/dasm tests: V_CVT_F16_U16 V_CVT_F16_I16 V_CVT_U16_F16 V_CVT_I16_F16 V_CVT_NORM_U16_F16 V_CVT_NORM_I16_F16 V_FREXP_EXP_I16_F16 Since this patch introduce fake16 instructions for V_CVT_F16_U16, it address an issue in fix-sgprs-copy-f16 test which is brought up here https://github.com/llvm/llvm-project/pull/104510#discussion_r1742499668
2024-09-20[llvm-c-test] Fix warningsKazu Hirata1-0/+3
This patch fixes: llvm/tools/llvm-c-test/debuginfo.c:254:20: error: unused variable 'AddDbgRecordLast' [-Werror,-Wunused-variable] llvm/tools/llvm-c-test/debuginfo.c:257:20: error: unused variable 'AddDbgRecordOverTheRange' [-Werror,-Wunused-variable] llvm/tools/llvm-c-test/debuginfo.c:264:20: error: unused variable 'AddDbgRecordUnderTheRange' [-Werror,-Wunused-variable]
2024-09-20[LoopPeel] Fix LCSSA phi node invalidationNikita Popov2-1/+105
In the test case, the BECount of the second loop uses %load, but we only have an LCSSA phi node for %add, so that is what gets invalidated. Use the forgetLcssaPhiWithNewPredecessor() API instead, which will invalidate the roots of the expression instead. Fixes https://github.com/llvm/llvm-project/issues/109333.
2024-09-20[TableGen] Eliminate use of `convertInitializerTo` in SearchableTable (#109206)Rahul Joshi1-7/+9
Eliminate use of `convertInitializerTo` as that needs a non-const RecordKeeper (which we want to make const).
2024-09-20[RISCV][TTI] Fix potential crash of using dyn_cast() in ↵Elvis Wang1-3/+3
getIntrinsicInstrCost() NFC. (#109379) This patch fix the potential crash about using dyn_cast in `vp_cmp` which is same as #109313. Check if the IntrinsicCostAttrubute contains underlying instruction first and cast to the VPCmpIntrinsic.
2024-09-20[VPlan] Generalize VPValue::isDefinedOutsideLoopRegions.Florian Hahn17-184/+186
Update isDefinedOutsideLoopRegions to check if a recipe is defined outside any region. Split off already approved https://github.com/llvm/llvm-project/pull/95842 now that this can be tested separately after landing VPlan-based LICM https://github.com/llvm/llvm-project/issues/107501
2024-09-20Revert "[RISCV][GISEL] Introduce the RISCVPostLegalizerLowering pass (#108991)"Michael Maitland6-170/+0
This reverts commit 64972834c193632cbc47e54c0f0c721636b077e6. Based on the discussions in #108991 that happened post merge, we have decided to remove this pass in favor of generating `RISCV::G_*` opcodes in the legalizer. We may reconsider moving that code elsewhere in the future so that we can do a better job during generic combines. We don't feel that doing it in instruciton selection is the right decision today. Firstly, it requires us to manually do regbankselect on the newly introduced instructions. Secondly, it is more difficult to test since the test output will contain whatever `RISCV::G_*` instructions select to (instead of `RISCV::G_*`). My personal opinion is that the legalizer pass can be split into an early legalizer and a late legalizer, both before regbankselect. The first legalizer would not introduce target specific generic opcodes and the generic combiner would run after it. The second legalizer would introduce the target specific generic opcodes. I think this approach is better than the lowerer because the legalizer guarantees that whatever we lower to is legal, and apparently because it is more performant at compared to the lowerer (although, I'm not sure how true this is).
2024-09-20[LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (#107802)Michal Rostecki6-14/+147
Since the migration from `@llvm.dbg.value` intrinsic to `#dbg_value` records, there is no way to retrieve the debug records for an `Instruction` in LLVM-C API. Previously, with debug info intrinsics, retrieving debug info for an `Instruction` could be done with `LLVMGetNextInstructions`, because the intrinsic call was also an instruction. However, to be able to retrieve debug info with the current LLVM, where debug records are used, the `getDbgRecordRange()` iterator needs to be exposed. Add new functions for DbgRecord sequence traversal: LLVMGetFirstDbgRecord LLVMGetLastDbgRecord LLVMGetNextDbgRecord LLVMGetPreviousDbgRecord See llvm/docs/RemoveDIsDebugInfo.md and release notes.
2024-09-20[MC] Add .loc_label instruction (#99710)alx329-16/+206
As discussed in [the RFC](https://discourse.llvm.org/t/rfc-extending-llvm-mc-loc-directive-with-labeling-support/79608) we need a way to create labels in the assembler-generated line section in order to support the future addition of the [DW_AT_LLVM_stmt_sequence](https://discourse.llvm.org/t/rfc-new-dwarf-attribute-for-symbolication-of-merged-functions/79434) attribute. We have a similar precedent for such behavior with the [.cfi_label](https://github.com/llvm/llvm-project/pull/97922) instruction - so we add the `.loc_label THE_LABEL_NAME` instruction which: - Terminates the current line sequence in the line section - Creates a new label with the specified label name in the `.debug_line` section
2024-09-20[ADT][NFC] Style and nit fixes in SmallSet (#108582)Victor Campos1-22/+21
2024-09-20[DebugInfo] Enable deprecation of iterator-insertion methods (#102608)Jeremy Morse4-132/+43
This is an almost-final step in eliminating debug-intrinsics -- read more about that here: https://llvm.org/docs/RemoveDIsDebugInfo.html . To correctly update variable location information in the background when inserting instructions, we need some information carried at runtime in BasicBlock::iterator, hence deprecating pointer-insertion. An immediate fix for any deprecation warnings is to call "getIterator" on the insertion position pointer. If you intend on inserting at the start of a block, use BB->begin() or similar methods to fetch the appropriate iterator.
2024-09-20[AArch64][InstCombine] Bail from combining SRAD on +/-1 divisor (#109274)Matthew Devereau2-0/+29
This fixes a crash when svdiv's third parameter is svdup_s64(1)
2024-09-20[AMDGPU] Do not use APInt for simple 64-bit arithmetic. NFC. (#109414)Jay Foad4-13/+9
2024-09-20[X86] Fix MSVC implicit shift extension warning.Simon Pilgrim1-1/+1
2024-09-20[AMDGPU] Use Lo_32 and Hi_32 helpers (NFC) (#109413)Nikita Popov6-17/+17
2024-09-20[CVP] Infer range return attribute (#99620)Nikita Popov7-33/+55
We already infer this in IPSCCP (which runs very early, so cannot benefit from inlining and simplifications) and SCCP (which runs without PredicateInfo, so does not use assumes). Do it in CVP as well, so it can handle cases that IPSCCP/SCCP can't. Fixes https://github.com/llvm/llvm-project/issues/98946 (everything apart from f2, where the assume is dropped by the frontend).
2024-09-20Revert "[SystemZ][z/OS] Propagate IsText parameter to open text files as ↵Abhina Sreeskantharajan6-61/+23
text (#107906)" This reverts commit edf3b277a5f2ebe144827ed47463c22743cac5f9.
2024-09-20Revert "[SystemZ][z/OS] Propagate IsText flag continuation"Abhina Sreeskantharajan1-1/+1
This reverts commit 3b3accb598ec87a6a30b0e18ded06071030bb78f.
2024-09-20[SandboxIR] Silence warning with Clang 19.1.0 on WindowsAlexandre Ganea1-1/+1
This fixes: ``` [1832/3777] Building CXX object lib\SandboxIR\CMakeFiles\LLVMSandboxIR.dir\SandboxIR.cpp.obj In file included from C:\src\git\llvm-project\llvm\lib\SandboxIR\SandboxIR.cpp:9: C:\src\git\llvm-project\llvm\include\llvm/SandboxIR/SandboxIR.h(4400,16): warning: unqualified friend declaration referring to type outside of the nearest enclosing namespace is a Microsoft extension; add a nested name specifier [-Wmicrosoft-unqualified-friend] 4400 | friend class TargetExtType; // For LLVMCtx. | ^ | ::llvm:: 1 warning generated. ```
2024-09-20[LLVM][TableGen] Adopt `indent` for indentation (#109275)Rahul Joshi4-200/+192
Adopt `indent` for indentation DAGISelMatcher and DecoderEmitter.
2024-09-20[LLVM][TableGen] Use const Record pointers in PredicateExpander (#109365)Rahul Joshi2-19/+17
Use const Record pointers in PredicateExpander. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-20[LLVM][TableGen] Change GISelCombinerEmitter to use const RecordKeeper (#109187)Rahul Joshi4-49/+41
Change GISelCombinerEmitter to use const RecordKeeper. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-20[LLVM][TableGen] Change DisassemblerEmitter to use const RecordKeeper (#109177)Rahul Joshi3-18/+12
Change DisassemblerEmitter to use const RecordKeeper. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-20[LLVM][TableGen] Change AsmMatcherEmitter to use const RecordKeeper (#109174)Rahul Joshi1-38/+35
Change AsmMatcherEmitter to use const RecordKeeper. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-20[VPlan] Add initial loop-invariant code motion transform. (#107894)Florian Hahn37-574/+746
Add initial transform to move out loop-invariant recipes. This also helps to fix a divergence between legacy and VPlan-based cost model due to legacy using ScalarEvolution::isLoopInvariant in some cases. Fixes https://github.com/llvm/llvm-project/issues/107501. PR: https://github.com/llvm/llvm-project/pull/107894