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2015-01-08[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the ↵Craig Topper1-1/+2
LEA variants in Intel syntax. The memory operand is inherently unsized. llvm-svn: 225432
2015-01-07Improvements to emacs packages for llvm and tablegen mode.Rafael Espindola2-50/+64
* Both files have valid package headers and footers (you can verify with M-x checkdoc). * Fixed style warnings generated by checkdoc. * Fixed a byte-compiler warning in llvm-mode.el. * Ensure that the modes are autoloaded, so users do not need to (require 'llvm-mode) to use them. Patch by Wilfred Hughes. llvm-svn: 225356
2015-01-07[X86] Remove some unused TYPE enums from the disassembler.Craig Topper1-1/+0
llvm-svn: 225343
2015-01-06[X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.Craig Topper1-2/+4
Requires new AsmParserOperand types that detect 16-bit and 32/64-bit mode so that we choose the right instruction based on default sizing without predicates. This is necessary since predicates mess up the disassembler table building. llvm-svn: 225256
2015-01-05[X86] Remove unused operand type from disassembler handling. NFCCraig Topper1-1/+0
llvm-svn: 225151
2015-01-03Fix some formatting in tablegen output.Craig Topper1-7/+4
llvm-svn: 225113
2015-01-03Replace some 'unreachable' comments with llvm_unreachable.Craig Topper1-2/+2
llvm-svn: 225112
2015-01-03[X86] Disassembler support for move to/from %rax with a 32-bit memory offset ↵Craig Topper2-2/+12
is REX.W and AdSize prefix are both present. llvm-svn: 225099
2015-01-02[X86] Make the instructions that use AdSize16/32/64 co-exist together ↵Craig Topper3-19/+44
without using mode predicates. This is necessary to allow the disassembler to be able to handle AdSize32 instructions in 64-bit mode when address size prefix is used. Eventually we should probably also support 'addr32' and 'addr16' in the assembler to override the address size on some of these instructions. But for now we'll just use special operand types that will lookup the current mode size to select the right instruction. llvm-svn: 225075
2014-12-31[X86] Fix disassembly of absolute moves to work correctly in 16 and 32-bit ↵Craig Topper2-14/+18
modes with all 4 combinations of OpSize and AdSize prefixes being present or not. llvm-svn: 225036
2014-12-25Masked Load/Store - Changed the order of parameters in intrinsics.Elena Demikhovsky2-2/+7
No functional changes. The documentation is coming. llvm-svn: 224829
2014-12-24[X86] Remove the single AdSize indicator and replace it with separate ↵Craig Topper3-5/+12
AdSize16/32/64 flags. This removes a hardcoded list of instructions in the CodeEmitter. Eventually I intend to remove the predicates on the affected instructions since in any given mode two of them are valid if we supported addr32/addr16 prefixes in the assembler. llvm-svn: 224809
2014-12-23Pass LSAN_OPTIONS down so that it is possible to add suppressions.Rafael Espindola1-1/+2
llvm-svn: 224777
2014-12-22Use iterators rather than indices to make this forwards-compatible with a ↵David Blaikie1-4/+5
change to the underlying container (to std::list) llvm-svn: 224734
2014-12-22unique_ptrify MatchableInfo(const CodeGenInstAlias *Alias)'s parameterDavid Blaikie1-14/+11
llvm-svn: 224733
2014-12-20Split executeShTest into two parts so that it can be better leveraged by libc++Eric Fiselier1-13/+18
llvm-svn: 224672
2014-12-19[LIT] Add JSONMetricValue type to wrap types supported by the json encoder.Eric Fiselier1-0/+36
Summary: The following types can be encoded and decoded by the json library: `dict`, `list`, `tuple`, `str`, `unicode`, `int`, `long`, `float`, `bool`, `NoneType`. `JSONMetricValue` can be constructed with any of these types, and used as part of Test.Result. This patch also adds a toMetricValue function that converts a value into a MetricValue. Reviewers: ddunbar, EricWF Reviewed By: EricWF Subscribers: cfe-commits, llvm-commits Differential Revision: http://reviews.llvm.org/D6576 llvm-svn: 224628
2014-12-16On behalf of Matthew Wahab:Evgeny Astigeevich1-1/+7
An instruction alias defined with InstAlias and an optional operand in the middle of the AsmString field, "..${a} <operands>", would get the final "}" printed in the instruction disassembly. This wouldn't happen if the optional operand appeared as the last item in the AsmString which is how the current backends avoided the problem. There don't appear to be any tests for this part of Tablegen but it passes the pre-commit tests. Manually tested the change by enabling the generic alias printer in the ARM backend and checking the output. Differential Revision: http://reviews.llvm.org/D6529 llvm-svn: 224348
2014-12-16[MC] Reset the MCInst in the matcher function before adding opcode/operands.Ahmed Bougacha1-0/+1
On X86, the Intel asm parser tries to match all memory operand sizes when none is explicitly specified. For LEA, which doesn't really have a memory operand (just a pointer one), this results in multiple successful matches, one for each memory size. There's no error because it's same opcode, so really, it's just one match. However, the tablegen'd matcher function adds opcode/operands to the passed MCInst, and this results in multiple duplicated operands. This commit clears the MCInst in the tablegen'd matcher function. We sometimes clear it when the match failed, so there's no expectation of keeping the previous content anyway. Differential Revision: http://reviews.llvm.org/D6670 llvm-svn: 224347
2014-12-15Use unique_ptr to remove explicit delete.Craig Topper3-9/+9
llvm-svn: 224224
2014-12-13Use range-based for loops.Craig Topper1-52/+35
llvm-svn: 224187
2014-12-12utils: update vim syntax highlighting for LLVM IRSaleem Abdulrasool1-17/+16
Add missing externally_initialized keyword from SVN r174340. Also reflow the text. llvm-svn: 224155
2014-12-12Clean up static analyzer warnings.Michael Ilseman3-2/+5
Clang's static analyzer found several potential cases of undefined behavior, use of un-initialized values, and potentially null pointer dereferences in tablegen, Support, MC, and ADT. This cleans them up with specific assertions on the assumptions of the code. llvm-svn: 224154
2014-12-12Now that we require a newer python, use the new exception syntax.Rafael Espindola1-1/+1
llvm-svn: 224130
2014-12-12Require python 2.7.Rafael Espindola1-2/+0
We were already requiring 2.5, which meant that people on old linux distros had to upgrade anyway. Requiring python 2.6 will make supporting 3.X easier as we can use the 3.X exception syntax. According to the discussion on llvmdev, there is not much value is requiring just 2.6, we may as well just require 2.7. llvm-svn: 224129
2014-12-11Try to include operand counts for mismatches in tablegen.Matt Arsenault1-6/+21
llvm-svn: 224068
2014-12-11Use range-based for loops. NFCCraig Topper1-9/+7
llvm-svn: 224005
2014-12-10Use unique_ptr instead of DeleteContainerSeconds.Craig Topper2-12/+12
llvm-svn: 223918
2014-12-10[LIT] Add support for `UNSUPPORTED` tag to ↵Eric Fiselier2-19/+29
`TestRunner.parseIntegratedTestScript` Summary: This patch gives me just enough to leverage the existing functionality in `TestRunner` for use in `libc++` and `libc++abi` . It does the following: * Adds the `UNSUPPORTED` tag to `TestRunner.parseIntegratedTestScript`. * Allows `parseIntegratedTestScript` to return an empty script if a script is not required by the caller. Reviewers: ddunbar, EricWF Reviewed By: EricWF Subscribers: cfe-commits, llvm-commits Differential Revision: http://reviews.llvm.org/D6589 llvm-svn: 223915
2014-12-10Tablegen'erate lanemasks for register units.Matthias Braun3-6/+86
Now we can relate lanemasks in a virtual register to register units. llvm-svn: 223889
2014-12-10Add function that translates subregister lane masks to other subregs.Matthias Braun3-1/+175
This works like the composeSubRegisterIndices() function but transforms a subregister lane mask instead of a subregister index. llvm-svn: 223874
2014-12-10Let tablegen compute maximum lanemask for regs/regclasses.Matthias Braun3-5/+20
Let tablegen compute the combination of subregister lanemasks for all subregisters in a register/register class. This is preparation for further work subregister allocation llvm-svn: 223873
2014-12-09Improve emacs coding styleWill Newton1-13/+8
Remove setting of default style, this way is not recommended and means that all the settings have to be duplicated to demonstrate the c-add-style method which is a much better way of doing it. Remove the modified date as it is better stored in SVN. Tweak a few style parameters to make them conform to the actual LLVM style. llvm-svn: 223765
2014-12-09Use range-based for loops. NFC.Craig Topper2-35/+24
llvm-svn: 223762
2014-12-08lit: Don't use python 2.6 featuresDavid Majnemer1-1/+1
LLVM supports python 2.5, this fixes a (somewhat) recent regression. llvm-svn: 223626
2014-12-06Fix for xunit output to work around issue in Jenkins when tests are at the ↵Chris Matthews1-1/+1
root level llvm-svn: 223562
2014-12-06Fix corner cases in lit xunit for paths with dotsChris Matthews1-2/+9
llvm-svn: 223549
2014-12-04test-release.sh: Add a way to specify --build to configureDaniel Sanders1-18/+29
Summary: I currently have to specify --build=mips-linux-gnu or --build=mipsel-linux-gnu to configure in order to successfully recurse a 32-bit build of the compiler on my mips64-linux-gnu and mips64el-linux-gnu targets. This is a bug and will be fixed but in the meantime it will be useful to have a way to work around this. Reviewers: tstellarAMD Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6522 llvm-svn: 223369
2014-12-04test-release.sh: Correct the logged configure command to match the one ↵Daniel Sanders1-1/+2
actually issued. --disable-timestamps was added to the configure command way back in r142647 but the command that echos this command to the log was not updated at the time. llvm-svn: 223351
2014-12-04Masked Load / Store Intrinsics - the CodeGen part.Elena Demikhovsky2-2/+11
I'm recommiting the codegen part of the patch. The vectorizer part will be send to review again. Masked Vector Load and Store Intrinsics. Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores. Added SDNodes for masked operations and lowering patterns for X86 code generator. Examples: <16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask) declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask) Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch. http://reviews.llvm.org/D6191 llvm-svn: 223348
2014-12-03Add a test-case for lit xunit outputChris Matthews1-0/+10
llvm-svn: 223307
2014-12-03Don't allow test-suite names with . in them in xml outputChris Matthews2-6/+8
llvm-svn: 223305
2014-12-03range-for some thingsDavid Blaikie1-19/+12
llvm-svn: 223263
2014-12-03Simplify CodeGenRegBank::inferMatchingSuperRegClass & its caller by passing ↵David Blaikie2-18/+23
an iterator rather than index llvm-svn: 223262
2014-12-03Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead ↵David Blaikie6-110/+100
of vector<CodeGenRegisterClass*> This complicates a few algorithms due to not having random access, but not by a huge degree I don't think (open to debate/design discussion/etc). llvm-svn: 223261
2014-12-03Range-for some stuff related to RegClasses, and comment cases where ↵David Blaikie6-124/+124
range-for isn't suitable. llvm-svn: 223260
2014-12-02Give lit a --xunit-xml-output option for saving results in xunit formatChris Matthews2-7/+55
--xunit-xml-output saves test results to disk in JUnit's xml format. This will allow Jenkins to report the details of a lit run. Based on a patch by David Chisnall. llvm-svn: 223163
2014-12-01[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & ↵Philip Reames1-0/+1
x86-64 Backend This is the second patch in a small series. This patch contains the MachineInstruction and x86-64 backend pieces required to lower Statepoints. It does not include the code to actually generate the STATEPOINT machine instruction and as a result, the entire patch is currently dead code. I will be submitting the SelectionDAG parts within the next 24-48 hours. Since those pieces are by far the most complicated, I wanted to minimize the size of that patch. That patch will include the tests which exercise the functionality in this patch. The entire series can be seen as one combined whole in http://reviews.llvm.org/D5683. The STATEPOINT psuedo node is generated after all gc values are explicitly spilled to stack slots. The purpose of this node is to wrap an actual call instruction while recording the spill locations of the meta arguments used for garbage collection and other purposes. The STATEPOINT is modeled as modifing all of those locations to prevent backend optimizations from forwarding the value from before the STATEPOINT to after the STATEPOINT. (Doing so would break relocation semantics for collectors which wish to relocate roots.) The implementation of STATEPOINT is closely modeled on PATCHPOINT. Eventually, much of the code in this patch will be removed. The long term plan is to merge the functionality provided by statepoints and patchpoints. Merging their implementations in the backend is likely to be a good starting point. Reviewed by: atrick, ributzka llvm-svn: 223085
2014-11-29Remove some unnecessary vector::reserve/assign calls.David Blaikie1-9/+5
llvm-svn: 222959
2014-11-29Remove indirection of vector<T*> in favor of deque<T>David Blaikie5-112/+101
llvm-svn: 222958
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