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path: root/llvm/utils/TableGen/CodeGenRegisters.cpp
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2016-08-11Use the range variant of find instead of unpacking begin/endDavid Majnemer1-2/+1
If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278433
2016-04-28TableGen: Produce CoveredBySubRegs summary for register classesMatthias Braun1-2/+5
This will be used in the upcoming "DetectDeadLanes" pass. llvm-svn: 267850
2016-04-28TableGen: Support lanemasks for classes without subregistersMatthias Braun1-38/+50
Previously using lanemasks on registers without any subregisters was not well defined. This commit extends TargetRegisterInfo/tablegen to: - Report a lanemask of 1 for regclasses without subregisters - Do the right thing when mapping a 0/1 lanemask from a class without subregisters into a class with subregisters in TargetRegisterInfo::composeSubRegIndexLaneMasks(). This will be used in the upcoming "DetectDeadLanes" patch. llvm-svn: 267848
2016-01-18[TableGen] Merge the SuperClass Record and SMRange vector into a single ↵Craig Topper1-4/+3
vector. This removes the state needed to manage the extra vector thus reducing the size of the Record class. NFC llvm-svn: 258065
2015-11-17Assume lane masks are always preciseMatthias Braun1-13/+6
Allowing imprecise lane masks in case of more than 32 sub register lanes lead to some tricky corner cases, and I need another bugfix for another one. Instead I rather declare lane masks as precise and let tablegen abort if we do not have enough bits. This does not affect any in-tree target, even AMDGPU only needs 16 lanes at the moment. If the 32 lanes turn out to be a problem in the future, then we can easily change the LaneBitmask typedef to uint64_t. Differential Revision: http://reviews.llvm.org/D14557 llvm-svn: 253279
2015-11-13tablegen: Add a simple heuristic to get better names for pressure setsMatthias Braun1-0/+6
Differential Revision: http://reviews.llvm.org/D14597 llvm-svn: 253095
2015-11-10TableGen: Emit LaneMask for register classes without subregisters as ~0uMatthias Braun1-0/+6
This makes it slightly easier to handle classes with and without subregister uniformly. llvm-svn: 252671
2015-06-02[TableGen] Rename ListInit::getSize to just 'size' to be more consistent.Craig Topper1-3/+3
llvm-svn: 238806
2015-05-29Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer1-2/+2
If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
2015-05-14[TableGen] Remove ListInit::size() in favor of getSize() which does the same ↵Craig Topper1-2/+2
thing and is already used in most places. NFC. llvm-svn: 237341
2015-04-24[TableGen] Don't leak Expanders and Operators in SetTheory.Craig Topper1-1/+1
llvm-svn: 235697
2015-04-15Change range-based for-loops to be -Wrange-loop-analysis clean.Richard Trieu1-1/+1
No functionality change. llvm-svn: 234963
2015-03-31Fix AllocationPriority not getting set for derived register classes.Matthias Braun1-1/+3
llvm-svn: 233752
2015-03-31RegAllocGreedy: Allow target to specify register class ordering.Matthias Braun1-0/+4
Specify an allocation order with a register class. This is used by register allocators with a greedy heuristic. This is usefull as it is sometimes beneficial to color more constrained classes first. Differential Revision: http://reviews.llvm.org/D8626 llvm-svn: 233743
2015-03-19Do not track subregister liveness when it brings no benefitsMatthias Braun1-0/+11
Some subregisters are only to indicate different access sizes, while not providing any way to actually divide the register up into multiple disjunct parts. Avoid tracking subregister liveness in these cases as it is not beneficial. Differential Revision: http://reviews.llvm.org/D8429 llvm-svn: 232695
2015-03-18TableGen: Fix register class lane masks being too conservative.Matthias Braun1-1/+1
When calculating the lanemask of a register class we have to include the masks of subregisters supported by any of the class members, not just the ones supported by all class members. This fixes problems when coalescing towards a subclass with additional subregisters available. The attached testcase works fine as is, but does crash if you enable subregister liveness on x86 without this change applied. llvm-svn: 232652
2015-03-03Revert the non-cleanup part of r230769 because it introduced a ↵Nick Lewycky1-2/+0
non-determinism found only in the names of symbols. llvm-svn: 231058
2015-02-28Silence variable set but not used warning in CodeGenRegisters.cpp, NFC.Yaron Keren1-0/+1
llvm-svn: 230854
2015-02-27Switch a std::map to a DenseMap in CodeGenRegisters.Owen Anderson1-0/+2
The keys of the map are unique by pointer address, so there's no need to use the llvm::less comparator. This allows us to use DenseMap instead, which reduces tblgen time by 20% on my stress test. llvm-svn: 230769
2015-02-16MSVC 2013 does not ICE on this code in the same fashion that MSVC 2012 did; NFC.Aaron Ballman1-3/+1
llvm-svn: 229422
2015-02-02STLExtras: Provide less/equal functors with templated function call ↵David Blaikie1-12/+11
operators, plus a deref'ing functor template utility Similar to the C++14 void specializations of these templates, useful as a stop-gap until LLVM switches to '14. Example use-cases in tblgen because I saw some functors that looked like they could be simplified/refactored. Reviewers: dexonsmith Differential Revision: http://reviews.llvm.org/D7324 llvm-svn: 227828
2015-01-31Replace another std::set in the core of CodeGenRegister, this time with ↵Owen Anderson1-39/+46
sorted arrays. The hot path through this region of code does lots of batch inserts into sets. By storing them as sorted arrays, we can defer the sorting to the end of the batch, which is dramatically more efficient. This reduces tblgen runtime by 25% on my worst-case target. llvm-svn: 227682
2015-01-31Change more of the guts of CodeGenRegister's RegUnit tracking to be based on ↵Owen Anderson1-54/+29
bit vectors. This is a continuation of my prior work to move some of the inner workings for CodeGenRegister to use bit vectors when computing about register units. This is highly beneficial to TableGen runtime on targets with large, dense register files. This patch represents a ~40% runtime reduction over and above my earlier improvement on a stress test of this case. llvm-svn: 227678
2015-01-30Change a very hot piece of code in TableGen's register unit computations to ↵Owen Anderson1-1/+14
use bit vectors rather than arrays. For target descriptions with very large and very dense register files, TableGen can take an extremely long time to run. This change makes a dent in that (~15% in my measurements) by accelerating the single hottest operation with better data structures. I believe there's still a lot of room to make this even faster with more global changes that require replacing some of the existing datastructures in this area with bit vectors, but that's a more involved change and I wanted to get this simpler improvement in first. llvm-svn: 227562
2014-12-12Clean up static analyzer warnings.Michael Ilseman1-0/+1
Clang's static analyzer found several potential cases of undefined behavior, use of un-initialized values, and potentially null pointer dereferences in tablegen, Support, MC, and ADT. This cleans them up with specific assertions on the assumptions of the code. llvm-svn: 224154
2014-12-10Tablegen'erate lanemasks for register units.Matthias Braun1-0/+37
Now we can relate lanemasks in a virtual register to register units. llvm-svn: 223889
2014-12-10Add function that translates subregister lane masks to other subregs.Matthias Braun1-0/+64
This works like the composeSubRegisterIndices() function but transforms a subregister lane mask instead of a subregister index. llvm-svn: 223874
2014-12-10Let tablegen compute maximum lanemask for regs/regclasses.Matthias Braun1-3/+15
Let tablegen compute the combination of subregister lanemasks for all subregisters in a register/register class. This is preparation for further work subregister allocation llvm-svn: 223873
2014-12-03range-for some thingsDavid Blaikie1-19/+12
llvm-svn: 223263
2014-12-03Simplify CodeGenRegBank::inferMatchingSuperRegClass & its caller by passing ↵David Blaikie1-16/+16
an iterator rather than index llvm-svn: 223262
2014-12-03Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead ↵David Blaikie1-57/+59
of vector<CodeGenRegisterClass*> This complicates a few algorithms due to not having random access, but not by a huge degree I don't think (open to debate/design discussion/etc). llvm-svn: 223261
2014-12-03Range-for some stuff related to RegClasses, and comment cases where ↵David Blaikie1-58/+66
range-for isn't suitable. llvm-svn: 223260
2014-11-29Remove some unnecessary vector::reserve/assign calls.David Blaikie1-9/+5
llvm-svn: 222959
2014-11-29Remove indirection of vector<T*> in favor of deque<T>David Blaikie1-36/+32
llvm-svn: 222958
2014-11-29Use deque<T> rather than vector<T*> since it provides the same invalidation ↵David Blaikie1-27/+19
semantics (at least when removal is not needed) without the extra indirection/ownership complexity Order matters for this container, it seems (using a forward_list and replacing the original push_backs with emplace_fronts caused test failures). I didn't look too deeply into why. (& in retrospect, I might go back & change some of the forward_lists I introduced to deques anyway - since most don't require removal, deque is a more memory-friendly data structure (moderate locality while not invalidating pointers)) llvm-svn: 222950
2014-11-29Constify some things in preparation for CodeGenSubRegIndex to be stored by ↵David Blaikie1-22/+21
value in their container, removing the indirection llvm-svn: 222949
2014-11-28Fix a few memory leaks in CodeGenRegBank.Craig Topper1-0/+6
llvm-svn: 222930
2014-11-19Remove StringMap::GetOrCreateValue in favor of StringMap::insertDavid Blaikie1-3/+6
Having two ways to do this doesn't seem terribly helpful and consistently using the insert version (which we already has) seems like it'll make the code easier to understand to anyone working with standard data structures. (I also updated many references to the Entry's key and value to use first() and second instead of getKey{Data,Length,} and get/setValue - for similar consistency) Also removes the GetOrCreateValue functions so there's less surface area to StringMap to fix/improve/change/accommodate move semantics, etc. llvm-svn: 222319
2014-08-27Fix some cases were ArrayRefs were being passed by reference. Also remove ↵Craig Topper1-1/+1
'const' from some other ArrayRef uses since its implicitly const already. llvm-svn: 216524
2014-08-24Use range based for loops to avoid needing to re-mention SmallPtrSet size.Craig Topper1-3/+2
llvm-svn: 216351
2014-04-22[Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth1-2/+2
definition below all of the header #include lines, TableGen edition. llvm-svn: 206846
2014-04-15[C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper1-6/+6
instead of comparing to nullptr. llvm-svn: 206254
2014-03-29tblgen: Twinify PrintFatalError.Benjamin Kramer1-1/+1
No functionality change. llvm-svn: 205110
2014-03-05[C++11] Add 'override' keywords to tablegen code.Craig Topper1-1/+1
llvm-svn: 202937
2014-03-03[C++11] Use std::tie to simplify compare operators.Benjamin Kramer1-5/+2
No functionality change. llvm-svn: 202751
2014-03-02[C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer1-4/+4
Remove the old functions. llvm-svn: 202636
2014-03-01Now that we have C++11, turn simple functors into lambdas and remove a ton ↵Benjamin Kramer1-11/+4
of boilerplate. No intended functionality change. llvm-svn: 202588
2014-01-24Replace tablegen uses of EVT with MVT. Add isOverloaded() to MVT to ↵Craig Topper1-1/+1
facilitate. Remove TGValueTypes.cpp since its unused now (and may have been before). llvm-svn: 200036
2013-09-22Provide basic type safety for array_pod_sort comparators.Benjamin Kramer1-3/+4
This makes using array_pod_sort significantly safer. The implementation relies on function pointer casting but that should be safe as we're dealing with void* here. llvm-svn: 191175
2013-07-31comment typo.Andrew Trick1-1/+1
llvm-svn: 187531
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