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path: root/llvm/utils/TableGen/AsmMatcherEmitter.cpp
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2016-09-08[TableGen] AsmMatcher: Add AsmVariantName to Instruction class.Sam Kolton1-0/+11
Summary: This allows specifying instructions that are available only in specific assembler variant. If AsmVariantName is specified then instruction will be presented only in MatchTable for this variant. If not specified then assembler variants will be determined based on AsmString. Also this allows splitting assembler match tables in same way as it is done in dissasembler. Reviewers: ab, tstellarAMD, craig.topper, vpykhtin Subscribers: wdng Differential Revision: https://reviews.llvm.org/D24249 llvm-svn: 280952
2016-08-12Use the range variant of find_if instead of unpacking begin/endDavid Majnemer1-11/+8
No functionality change is intended. llvm-svn: 278443
2016-08-11Use the range variant of find instead of unpacking begin/endDavid Majnemer1-2/+1
If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278433
2016-07-27[mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText.Daniel Sanders1-2/+17
Summary: This is one possible solution to the problem of ignoring constraints that Simon raised in D21473 but it's a bit of a hack. The integrated assembler currently ignores violations of the tied register constraints when the operands involved in a tie are both present in the AsmText. For example, 'dati $rs, $rt, $imm' with the '$rs = $rt' will silently replace $rt with $rs. So 'dati $2, $3, 1' is processed as if the user provided 'dati $2, $2, 1' without any diagnostic being emitted. This is difficult to solve properly because there are multiple parts of the matcher that are silently forcing these constraints to be met. Tied operands are rendered to instructions by cloning previously rendered operands but this is unnecessary because the matcher was already instructed to render the operand it would have cloned. This is also unnecessary because earlier code has already replaced the MCParsedOperand with the one it was tied to (so the parsed input is matched as if it were 'dati <RegIdx 2>, <RegIdx 2>, <Imm 1>'). As a result, it looks like fixing this properly amounts to a rewrite of the tied operand handling which affects all targets. This patch however, merely inserts a checking hook just before the substitution of MCParsedOperands and the Mips target overrides it. It's not possible to accurately check the registers are the same this early (because numeric registers haven't been bound to a register class yet) so it cheats a bit and checks that the tokens that produced the operand are lexically identical. This works because tied registers need to have the same register class but it does have a flaw. It will reject 'dati $4, $a0, 1' for violating the constraint even though $a0 ends up as the same register as $4. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: https://reviews.llvm.org/D21994 llvm-svn: 276867
2016-06-23[TableGen] Use StringRef::compare instead of != and <. NFC.Ahmed Bougacha1-2/+2
The previous code would always do 1 or 2 prefix compares; explicitly only do one. This speeds up debug -gen-asm-matcher by ~10% (e.g. X86: 40s -> 35s). llvm-svn: 273583
2016-05-06[TableGen] AsmMatcher: support for default values for optional operandsSam Kolton1-31/+117
Summary: This change allows to specify "DefaultMethod" for optional operand (IsOptional = 1) in AsmOperandClass that return default value for operand. This is used in convertToMCInst to set default values in MCInst. Previously if you wanted to set default value for operand you had to create custom converter method. With this change it is possible to use standard converters even when optional operands presented. Reviewers: tstellarAMD, ab, craig.topper Subscribers: jyknight, dsanders, arsenm, nhaustov, llvm-commits Differential Revision: http://reviews.llvm.org/D18242 llvm-svn: 268726
2016-04-18[NFC] Header cleanupMehdi Amini1-2/+1
Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
2016-04-05[TableGen] AsmMatcherEmitter.cpp: replace a sequence of "if" to "switch" in ↵Valery Pykhtin1-2/+6
emitValidateOperandClass. Differential Revision: http://reviews.llvm.org/D18394 llvm-svn: 265412
2016-03-01[TableGen] AsmMatcher: Skip optional operands in the midle of instruction if ↵Nikolay Haustov1-14/+21
it is not present Previosy, if actual instruction have one of optional operands then other optional operands listed before this also should be presented. For example instruction v_fract_f32 v0, v1, mul:2 have one optional operand - OMod and do not have optional operand clamp. Previously this was not allowed because clamp is listed before omod in AsmString: string AsmString = "v_fract_f32$vdst, $src0_modifiers$clamp$omod"; Making this work required some hacks (both OMod and Clamp match classes have same PredicateMethod). Now, if MatchInstructionImpl meets formal optional operand that is not presented in actual instruction it skips this formal operand and tries to match current actual operand with next formal. Patch by: Sam Kolton Review: http://reviews.llvm.org/D17568 [AMDGPU] Assembler: Check immediate types for several optional operands in predicate methods With this change you should place optional operands in order specified by asm string: clamp -> omod offset -> glc -> slc -> tfe Fixes for several tests. Depends on D17568 Patch by: Sam Kolton Review: http://reviews.llvm.org/D17644 llvm-svn: 262314
2016-02-05TableGen: Add IsOptional field to AsmOperandClassTom Stellard1-1/+15
Summary: This makes it possible to specify some operands as optional to the AsmMatcher. Setting this field to true will prevent the AsmMatcher from emitting 'too few operands' errors when there are missing optional operands. Reviewers: olista01, ab Subscribers: nhaustov, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15755 llvm-svn: 259913
2016-02-03[TableGen] Add 'register alternative name matching' supportDylan McKay1-0/+34
Summary: This adds a new attribute which targets can set in TableGen which causes a function to be generated which matches register alternative names. This is very similar to `ShouldEmitMatchRegisterName`, except it works on alt names. This patch is currently used by the out of tree part of the AVR backend. It reduces code duplication greatly, and has the effect that you do not need to hardcode altname to register mappings in C++. It will not work on targets which have registers which share the same aliases. Reviewers: stoklund, arsenm, dsanders, hfinkel, vkalintiris Subscribers: hfinkel, dylanmckay, llvm-commits Differential Revision: http://reviews.llvm.org/D16312 llvm-svn: 259636
2016-02-02Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.Eugene Zelenko1-11/+5
Differential revision: http://reviews.llvm.org/D16793 llvm-svn: 259539
2016-01-25[TableGen] Fix sort order of asm operand classesOliver Stannard1-20/+85
This is a fix for https://llvm.org/bugs/show_bug.cgi?id=22796. The previous implementation of ClassInfo::operator< allowed cycles of classes such that x < y < z < x, meaning that a list of them cannot be correctly sorted, and the sort order could differ with different standard libraries. The original implementation sorted classes by ValueName if they were otherwise equal. This isn't strictly necessary, but some backends seem to accidentally rely on it. If I reverse this comparison I get 8 test failures spread across the AArch64, Mips and X86 backends, so I have left it in until those backends can be fixed. There was one case in the X86 backend where the observable behaviour of the assembler is changed by this patch. This was because some of the memory asm operands were not marked as children of X86MemAsmOperand. Differential Revision: http://reviews.llvm.org/D16141 llvm-svn: 258677
2016-01-17[TableGen] Replace instructions() with getInstructionsByEnumValue(). No need ↵Craig Topper1-1/+1
to make an iterator_range when we already have a function that returns an ArrayRef. NFC llvm-svn: 258019
2016-01-03[TableGen] Replace a logically negated xor of bools with just an equality ↵Craig Topper1-1/+1
comparison for readability. NFC llvm-svn: 256699
2016-01-03[TableGen] Use std::find_if and a lambda instead of manual loops.Craig Topper1-9/+10
llvm-svn: 256698
2016-01-03[TableGen] Fix a bug introduced in r256627. If the switch was not emitted we ↵Craig Topper1-2/+3
still emitted a closing curly brace. llvm-svn: 256697
2016-01-03[TableGen] Use range-based for loops. NFCCraig Topper1-20/+13
llvm-svn: 256696
2015-12-31[TableGen] Modify the AsmMatcherEmitter to only apply the table growth from ↵Craig Topper1-63/+110
r252440 to the Hexagon target. This restores the previous behavior of not including the mnemonic in the classes table for every target that starts instruction lines with the mnemonic. Not only did the table size increase by 1 entry, but the class enum increased in size which caused every class in the array to increase in size. It also grew the size of the function that parsers tokens into classes by a substantial amount. This adds a new HasMnemonicFirst flag to all AsmParsers. It's set to 1 by default and Hexagon target overrides it to 0. For the X86 target alone this recovers 324KB of size on the llvm-mc executable. I believe the current state is still a bad design choice for the Hexagon target as it causes most of the parsing to do a linear search through the entire match table to comparing operands against every instruction until it finds one that works. At least for the other targets we do a binary search based on mnemonic over which to do the linear scan. llvm-svn: 256669
2015-12-31[TableGen] Use range-based for loops. NFCCraig Topper1-8/+3
llvm-svn: 256668
2015-12-31[TableGen] Move determination of IsIsolatedToken into the tokenizer instead ↵Craig Topper1-31/+33
of trying to search characters around the token. No functional change intended. Verified for in-tree targets. llvm-svn: 256660
2015-12-30[TableGen] Remove unnecessary conversion from StringRef to std::string when ↵Craig Topper1-2/+2
outputting to a raw_ostream. NFC llvm-svn: 256628
2015-12-30[TableGen] Remove raw_string_ostream by just emitting the header for the ↵Craig Topper1-20/+20
switch the first time we emit a case. If the header was never emitted just print the default at the end. NFC llvm-svn: 256627
2015-12-30[TableGen] Use range-based for loops. NFCCraig Topper1-4/+4
llvm-svn: 256626
2015-12-30[TableGen] Move more things that come from variant into the AsmVariantInfo ↵Craig Topper1-12/+12
class so we can reduce some parameters. NFC llvm-svn: 256625
2015-12-30[TableGen] Use 'size_t' instead of 'unsigned' to better match the argument ↵Craig Topper1-5/+5
types of addAsmOperand. Simplify some code by using StringRef::find instead of std::find. These were previously done in r247527 and r247528, but another commit seems to have erased them. NFC llvm-svn: 256624
2015-12-29De-virtualize mnemonicIsValid and remove from the base class. It's not ↵Craig Topper1-1/+1
called by any common code. llvm-svn: 256544
2015-12-29[TableGen] Add missing space to output.Craig Topper1-1/+1
llvm-svn: 256540
2015-12-29[TableGen] Use range-based for loops. NFCCraig Topper1-10/+5
llvm-svn: 256539
2015-11-18Default SetVector to use a DenseSet.Rafael Espindola1-3/+3
We use to have an odd difference among MapVector and SetVector. The map used a DenseMop, but the set used a SmallSet, which in turn uses a std::set. I have changed SetVector to use a DenseSet. If you were depending on the old behaviour you can pass an explicit set type or use SmallSetVector. The common cases for needing to do it are: * Optimizing for small sets. * Sets for types not supported by DenseSet. llvm-svn: 253439
2015-11-14[MCTargetAsmParser] Move the member varialbes that referenceAkira Hatanaka1-1/+1
MCSubtargetInfo in the subclasses into MCTargetAsmParser and define a member function getSTI. This is done in preparation for making changes to shrink the size of MCRelaxableFragment. (see http://reviews.llvm.org/D14346). llvm-svn: 253124
2015-11-09[AsmParser] Generalize matching for grammars without mnemonic-lead statementsColin LeMahieu1-35/+31
Differential Revision: http://reviews.llvm.org/D14257 llvm-svn: 252440
2015-11-09[AsmParser] Backends can parameterize ASM tokenization.Colin LeMahieu1-47/+68
llvm-svn: 252439
2015-09-13[TableGen] Use range-based for loops and make a helper function static. NFCCraig Topper1-46/+39
llvm-svn: 247529
2015-09-13[TableGen] Simplify some code by using StringRef::find instead of std::find. NFCCraig Topper1-3/+3
llvm-svn: 247528
2015-09-13[TableGen] Use 'size_t' instead of 'unsigned' to better match the argument ↵Craig Topper1-2/+2
types of addAsmOperand. NFC llvm-svn: 247527
2015-09-06[TableGen] Use make_unique. NFC.Craig Topper1-3/+3
llvm-svn: 246936
2015-08-16[TableGen] Use range-based for loop.Craig Topper1-4/+2
llvm-svn: 245191
2015-08-16[TableGen] Move the ConversionRow vector into the ConversionTable instead of ↵Craig Topper1-1/+1
copying. llvm-svn: 245190
2015-08-10[TableGen] NFC improving comments about what the tokenized identifiers will ↵Colin LeMahieu1-1/+2
contain. llvm-svn: 244493
2015-08-01-Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are ↵David Blaikie1-0/+14
deprecated in C++11 llvm-svn: 243816
2015-06-30Reverting r241058 because it's causing buildbot failures.Ranjeet Singh1-30/+26
llvm-svn: 241061
2015-06-30There are a few places where subtarget features are stillRanjeet Singh1-26/+30
represented by uint64_t, this patch replaces these usages with the FeatureBitset (std::bitset) type. Differential Revision: http://reviews.llvm.org/D10542 llvm-svn: 241058
2015-06-02[TableGen] Use range-based for loops. NFC.Craig Topper1-2/+2
llvm-svn: 238805
2015-05-29Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer1-6/+4
If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
2015-05-29[TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers.Ahmed Bougacha1-4/+22
Fixes PR23455, where, when TableGen generates the matcher from the AsmString, it splits "cmp${cc}ss" into tokens, and the "ss" suffix is recognized as the SS register. I can't think of a situation where that's a feature, not a bug, hence: when a token is "isolated", i.e., it is followed and preceded by separators, it shouldn't be parsed as a register. Differential Revision: http://reviews.llvm.org/D9844 llvm-svn: 238536
2015-05-29[TableGen][AsmMatcherEmitter] Factor out AsmOperand creation. NFC.Ahmed Bougacha1-8/+15
llvm-svn: 238534
2015-05-26AsmMatcherEmitter: Add an option to override custom converters for InstAliasTom Stellard1-3/+12
If there is an InstAlias defined for an instruction that had a custom converter (AsmMatchConverter), then when the alias is matched, the custom converter will be used rather than the converter generated by the InstAlias. This patch adds the UseInstAsmMatchConverter field to the InstAlias class, which allows you to override this behavior and force the converter generated by the InstAlias to be used. This is required for some future improvemnts to the R600 assembler. Differential Revision: http://reviews.llvm.org/D9083 llvm-svn: 238210
2015-05-26Use std::bitset for SubtargetFeatures.Michael Kuperstein1-7/+5
Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. llvm-svn: 238192
2015-05-13MC: Modernize MCOperand API naming. NFC.Jim Grosbach1-2/+2
MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
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