aboutsummaryrefslogtreecommitdiff
path: root/llvm/test
AgeCommit message (Collapse)AuthorFilesLines
2016-09-13Defer asm errors to post-statement failureNirav Dave3-471/+223
Recommitting after fixing AsmParser Initialization. Allow errors to be deferred and emitted as part of clean up to simplify and shorten Assembly parser code. This will allow error messages to be emitted in helper functions and be modified by the caller which has better context. As part of this many minor cleanups to the Parser: * Unify parser cleanup on error * Add Workaround for incorrect return values in ParseDirective instances * Tighten checks on error-signifying return values for parser functions and fix in-tree TargetParsers to be more consistent with the changes. * Fix AArch64 test cases checking for spurious error messages that are now fixed. These changes should be backwards compatible with current Target Parsers so long as the error status are correctly returned in appropriate functions. Reviewers: rnk, majnemer Subscribers: aemerson, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D24047 llvm-svn: 281336
2016-09-13[InstSimplify] Add tests to show missed bitcast folding opportunities.Andrea Di Biagio1-0/+144
InstSimplify doesn't always know how to fold a bitcast of a constant vector. In particular, the logic in InstSimplify doesn't know how to handle the case where the constant vector in input contains some undef elements, and the number of elements is smaller than the number of elements of the bitcast vector type. llvm-svn: 281332
2016-09-13Revert "[ARM] Promote small global constants to constant pools"James Molloy1-109/+0
This reverts commit r281314. Speculatively revert as it's possible this caused linker errors: http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/19656 llvm-svn: 281327
2016-09-13Remove InstCombine test fileSam Parker1-17/+0
My previous commit should of removed a test file but I missed it. llvm-svn: 281326
2016-09-13[ARM] Add ".code 32" to functions in the ARM instruction setPablo Barrio2-2/+26
Before, only Thumb functions were marked as ".code 16". These ".code x" directives are effective until the next directive of its kind is encountered. Therefore, in code with interleaved ARM and Thumb functions, it was possible to declare a function as ARM and end up with a Thumb function after assembly. A test has been added. An existing test has also been fixed to take this change into account. Reviewers: aschwaighofer, t.p.northover, jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D24337 llvm-svn: 281324
2016-09-13[Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy7-21/+93
For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)). 1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS. 2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS. 3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS). 4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask. 1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win. llvm-svn: 281323
2016-09-13Enable simplify libcalls for ARM PCSSam Parker2-0/+229
Teach SimplifyLibcalls that in can treat functions annotated with apcs, aapcs or aapcs_vfp like normal C functions if they only take and return integer or pointer values, and the target is not iOS. Differential Revision: https://reviews.llvm.org/D24453 llvm-svn: 281322
2016-09-13[llvm-cov] - Included footer "Generated by llvm-cov -- llvm version <version ↵Ying Yi1-7/+11
number>" in the coverage report. The llvm-cov version information will be useful to the user when comparing the code coverage across different versions of llvm-cov. This patch provides the llvm-cov version information in the generated coverage report. Differential Revision: https://reviews.llvm.org/D24457 llvm-svn: 281321
2016-09-13[ARM] Support ldr.w in pseudo instruction ldr rd,=immediatePeter Smith1-0/+71
The changes made in r269352, r269353 and r269354 to support the transformation of the ldr rd,=immediate to mov introduced a regression from 3.8 (ldr.w rd, =immediate) not supported. This change puts support back in for ldr.w by means of a t2InstAlias for the .w form. The .w is ignored in ARM state and propagated to the ldr in Thumb2. llvm-svn: 281319
2016-09-13[ARM] Promote small global constants to constant poolsJames Molloy1-0/+109
If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). llvm-svn: 281314
2016-09-13[WebAssembly] Trying to fix broken tests in CodeGen/WebAssembly caused by ↵Eric Liu2-2/+2
r281285. Reviewers: bkramer, ddcc, dschuff, sunfish Subscribers: jfb, llvm-commits, dschuff Differential Revision: https://reviews.llvm.org/D24497 llvm-svn: 281312
2016-09-13Remove MVT:i1 xor instruction before SELECT. (Performance improvement).Ayman Musa2-11/+53
Differential Revision: https://reviews.llvm.org/D23764 llvm-svn: 281308
2016-09-13Revert of r281304 as it is causing build bot failures in hexagonSjoerd Meijer1-5/+25
hwloop regression tests. These tests pass locally; will be investigating where these differences come from. llvm-svn: 281306
2016-09-13This adds a new field isAdd to MCInstrDesc. The ARM and Hexagon instructionSjoerd Meijer1-25/+5
descriptions now tag add instructions, and the Hexagon backend is using this to identify loop induction statements. Patch by Sam Parker and Sjoerd Meijer. Differential Revision: https://reviews.llvm.org/D23601 llvm-svn: 281304
2016-09-13AVX-512: Fix for PR28175 - Scalar code optimization.Elena Demikhovsky4-22/+88
Optimized (truncate (assertzext x) to i1) and anyext i1 to i8/16/32. Optimization of this patterns is a one more step towards i1 optimization on AVX-512. Differential Revision: https://reviews.llvm.org/D24456 llvm-svn: 281302
2016-09-13[AArch64] Support stackmap/patchpoint in getInstSizeInBytesDiana Picus2-0/+170
We currently return 4 for stackmaps and patchpoints, which is very optimistic and can in rare cases cause the branch relaxation pass to fail to relax certain branches. This patch causes getInstSizeInBytes to return a pessimistic estimate of the size as the number of bytes requested in the stackmap/patchpoint. In the future, we could provide a more accurate estimate by sharing some of the logic in AArch64::LowerSTACKMAP/PATCHPOINT. Fixes part of https://llvm.org/bugs/show_bug.cgi?id=28750 Differential Revision: https://reviews.llvm.org/D24073 llvm-svn: 281301
2016-09-13[X86] Remove masked shufpd/shufps intrinsics and autoupgrade to native ↵Craig Topper4-118/+118
vector shuffles. They were removed from clang previously but accidentally left in the backend. llvm-svn: 281300
2016-09-13DebugInfo: New metadata representation for global variables.Peter Collingbourne136-476/+566
This patch reverses the edge from DIGlobalVariable to GlobalVariable. This will allow us to more easily preserve debug info metadata when manipulating global variables. Fixes PR30362. A program for upgrading test cases is attached to that bug. Differential Revision: http://reviews.llvm.org/D20147 llvm-svn: 281284
2016-09-13X86: Conditional tail calls should not have isBarrier = 1Hans Wennborg2-3/+31
That confuses e.g. machine basic block placement, which then doesn't realize that control can fall through a block that ends with a conditional tail call. Instead, isBranch=1 should be set. Also, mark EFLAGS as used by these instructions. llvm-svn: 281281
2016-09-13Temporarily Revert "[MC] Defer asm errors to post-statement failure" as it's ↵Eric Christopher3-223/+471
causing errors on the sanitizer bots. This reverts commit r281249. llvm-svn: 281280
2016-09-12add more tests for PR30273Sanjay Patel1-2/+32
llvm-svn: 281270
2016-09-12Revert r281215, it caused PR30358.Nico Weber7-93/+21
llvm-svn: 281263
2016-09-12Lower consecutive select instructions correctly.Dehao Chen1-0/+44
Summary: If consecutive select instructions are lowered separately in CGP, it will introduce redundant condition check and branches that cannot be removed by later optimization phases. This patch lowers all consecutive select instructions at the same to to avoid inefficent code as demonstrated in https://llvm.org/bugs/show_bug.cgi?id=29095 Reviewers: davidxl Subscribers: vsk, llvm-commits Differential Revision: https://reviews.llvm.org/D24147 llvm-svn: 281252
2016-09-12[MC] Defer asm errors to post-statement failureNirav Dave3-471/+223
Allow errors to be deferred and emitted as part of clean up to simplify and shorten Assembly parser code. This will allow error messages to be emitted in helper functions and be modified by the caller which has better context. As part of this many minor cleanups to the Parser: * Unify parser cleanup on error * Add Workaround for incorrect return values in ParseDirective instances * Tighten checks on error-signifying return values for parser functions and fix in-tree TargetParsers to be more consistent with the changes. * Fix AArch64 test cases checking for spurious error messages that are now fixed. These changes should be backwards compatible with current Target Parsers so long as the error status are correctly returned in appropriate functions. Reviewers: rnk, majnemer Subscribers: aemerson, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D24047 llvm-svn: 281249
2016-09-12[InstCombine] add test for PR30327Sanjay Patel1-0/+14
llvm-svn: 281248
2016-09-12[InstCombine] regenerate checksSanjay Patel1-4/+7
llvm-svn: 281247
2016-09-12AVX-512: Added a test for -O0 mode. NFC.Elena Demikhovsky1-0/+52
llvm-svn: 281246
2016-09-12AVX-512: Simplified masked_gather_scatter test. NFC.Elena Demikhovsky1-183/+6
llvm-svn: 281244
2016-09-12Fix test failure in r281232Hemant Kulkarni2-0/+0
llvm-svn: 281240
2016-09-12llvm-size: Add --totals optionHemant Kulkarni1-1/+2
Differential Revision: https://reviews.llvm.org/D24308 llvm-svn: 281233
2016-09-12llvm-objdump: Add --start-address and --stop-address optionsHemant Kulkarni2-0/+102
Differential Revision: https://reviews.llvm.org/D24160 llvm-svn: 281232
2016-09-12[InstCombine] use m_APInt to allow icmp X, C folds for splat constant vectorsSanjay Patel2-5/+3
isSignBitCheck could be changed to take a pointer param to avoid the 'UnusedBit' ugliness. llvm-svn: 281231
2016-09-12AMDGPU: Do not clobber SCC in SIWholeQuadModeNicolai Haehnle1-0/+37
Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D22198 llvm-svn: 281230
2016-09-12Revert "[ARM] Promote small global constants to constant pools"James Molloy1-99/+0
This reverts commit r281213. It made a bot go bang: http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/14625 llvm-svn: 281228
2016-09-12[BranchFolding] Unique added live-ins after hoisting code.Ahmed Bougacha1-1/+1
We're not supposed to have duplicate live-ins. llvm-svn: 281224
2016-09-12[X86] Copy imp-uses when folding tailcall into conditional branch.Ahmed Bougacha1-0/+84
r280832 added 32-bit support for emitting conditional tail-calls, but dropped imp-used parameter registers. This went unnoticed until r281113, which added 64-bit support, as this is only exposed with parameter passing via registers. Don't drop the imp-used parameters. llvm-svn: 281223
2016-09-12[FunctionAttrs] Don't try to infer returned if it is already on an argumentDavid Majnemer1-0/+12
Trying to infer the 'returned' attribute if an argument is already 'returned' can lead to verification failure: inference might determine that a different argument is passed through which would result in two different arguments marked as 'returned'. This fixes PR30350. llvm-svn: 281221
2016-09-12[InstCombine] add tests to show missing vector foldsSanjay Patel2-1/+29
llvm-svn: 281219
2016-09-12add select i1 test, reproduser pr30249.Igor Breger1-0/+12
llvm-svn: 281218
2016-09-12[Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy7-21/+93
For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)). 1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS. 2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS. 3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS). 4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask. 1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win. llvm-svn: 281215
2016-09-12[ARM] Promote small global constants to constant poolsJames Molloy1-0/+99
If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). llvm-svn: 281213
2016-09-12Fix the Thumb test for vfloat intrinsicsPablo Barrio1-55/+56
Summary: This test was not testing the intrinsics. A function like this: define %v4f32 @test_v4f32.floor(%v4f32 %a){ ... %1 = call %v4f32 @llvm.floor.v4f32(%v4f32 %a) ... } is transformed into the following assembly: _test_v4f32.floor: @ @test_v4f32.floor ... bl _floorf ... In each function tested, there are two CHECK: one that checked for the label and another one for the intrinsic that should be used inside the function (in our case, "floor"). However, although the first CHECK was matching the label, the second was not matching the intrinsic, but the second "floor" in the same line as the label. This is fixed by making the first CHECK match the entire line. Reviewers: jmolloy, rengolin Subscribers: rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D24398 llvm-svn: 281211
2016-09-12GlobalISel: support translation of global addresses.Tim Northover1-0/+28
llvm-svn: 281207
2016-09-12GlobalISel: translate GEP instructions.Tim Northover1-0/+85
Unlike SDag, we use a separate G_GEP instruction (much simplified, only taking a single byte offset) to preserve the pointer type information through selection. llvm-svn: 281205
2016-09-12GlobalISel: disambiguate types when printing MIRTim Northover9-83/+83
Some generic instructions have multiple types. While in theory these always be discovered by inspecting the single definition of each generic vreg, in practice those definitions won't always be local and traipsing through a big function to find them will not be fun. So this changes MIRPrinter to print out the type of uses as well as defs, if they're known to be different or not known to be the same. On the parsing side, we're a little more flexible: provided each register is given a type in at least one place it's mentioned (and all types are consistent) we accept the MIR. This doesn't introduce ambiguity but makes writing tests manually a bit less painful. llvm-svn: 281204
2016-09-12AVX-512: Added a test case that should be optimized in the future. NFC.Elena Demikhovsky1-13/+48
llvm-svn: 281196
2016-09-12llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll REQUIRES +Asserts.NAKAMURA Takumi1-0/+1
This might not *crash* with -Asserts. I saw it caused infinite loop in the codegen. llvm-svn: 281190
2016-09-12[InstCombine] regenerate checksSanjay Patel1-52/+55
llvm-svn: 281186
2016-09-12[InstCombine] regenerate checksSanjay Patel1-98/+108
llvm-svn: 281185
2016-09-11Fixup failing debuginfo test for change in SimplifyCFG.James Molloy1-2/+1
This reverts this test back to its original pre-r280364 behaviour as we don't sink allocas any more. llvm-svn: 281163
generated by cgit v1.1 at 2025-10-18 23:51:34 +0000