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2016-09-13Apply Clang-format to MCAsmParser.cpp NFC.Nirav Dave1-1/+2
llvm-svn: 281337
2016-09-13Defer asm errors to post-statement failureNirav Dave10-352/+252
Recommitting after fixing AsmParser Initialization. Allow errors to be deferred and emitted as part of clean up to simplify and shorten Assembly parser code. This will allow error messages to be emitted in helper functions and be modified by the caller which has better context. As part of this many minor cleanups to the Parser: * Unify parser cleanup on error * Add Workaround for incorrect return values in ParseDirective instances * Tighten checks on error-signifying return values for parser functions and fix in-tree TargetParsers to be more consistent with the changes. * Fix AArch64 test cases checking for spurious error messages that are now fixed. These changes should be backwards compatible with current Target Parsers so long as the error status are correctly returned in appropriate functions. Reviewers: rnk, majnemer Subscribers: aemerson, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D24047 llvm-svn: 281336
2016-09-13[LoopInterchange] Minor refactor. NFC.Chad Rosier1-12/+11
llvm-svn: 281334
2016-09-13Don't use else if after return. Tidy comments. NFC.Chad Rosier1-5/+3
llvm-svn: 281331
2016-09-13Typo. NFC.Chad Rosier1-3/+3
llvm-svn: 281330
2016-09-13[LoopInterchange] Tidy up and remove unnecessary dyn_casts. NFC.Chad Rosier1-13/+12
llvm-svn: 281328
2016-09-13Revert "[ARM] Promote small global constants to constant pools"James Molloy4-144/+1
This reverts commit r281314. Speculatively revert as it's possible this caused linker errors: http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/19656 llvm-svn: 281327
2016-09-13[ARM] Add ".code 32" to functions in the ARM instruction setPablo Barrio1-1/+2
Before, only Thumb functions were marked as ".code 16". These ".code x" directives are effective until the next directive of its kind is encountered. Therefore, in code with interleaved ARM and Thumb functions, it was possible to declare a function as ARM and end up with a Thumb function after assembly. A test has been added. An existing test has also been fixed to take this change into account. Reviewers: aschwaighofer, t.p.northover, jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D24337 llvm-svn: 281324
2016-09-13[Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy2-5/+138
For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)). 1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS. 2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS. 3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS). 4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask. 1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win. llvm-svn: 281323
2016-09-13Enable simplify libcalls for ARM PCSSam Parker1-3/+35
Teach SimplifyLibcalls that in can treat functions annotated with apcs, aapcs or aapcs_vfp like normal C functions if they only take and return integer or pointer values, and the target is not iOS. Differential Revision: https://reviews.llvm.org/D24453 llvm-svn: 281322
2016-09-13[ARM] Support ldr.w in pseudo instruction ldr rd,=immediatePeter Smith2-0/+7
The changes made in r269352, r269353 and r269354 to support the transformation of the ldr rd,=immediate to mov introduced a regression from 3.8 (ldr.w rd, =immediate) not supported. This change puts support back in for ldr.w by means of a t2InstAlias for the .w form. The .w is ignored in ARM state and propagated to the ldr in Thumb2. llvm-svn: 281319
2016-09-13[ARM] Promote small global constants to constant poolsJames Molloy4-1/+144
If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). llvm-svn: 281314
2016-09-13Remove MVT:i1 xor instruction before SELECT. (Performance improvement).Ayman Musa1-0/+16
Differential Revision: https://reviews.llvm.org/D23764 llvm-svn: 281308
2016-09-13Revert of r281304 as it is causing build bot failures in hexagonSjoerd Meijer5-52/+49
hwloop regression tests. These tests pass locally; will be investigating where these differences come from. llvm-svn: 281306
2016-09-13This adds a new field isAdd to MCInstrDesc. The ARM and Hexagon instructionSjoerd Meijer5-49/+52
descriptions now tag add instructions, and the Hexagon backend is using this to identify loop induction statements. Patch by Sam Parker and Sjoerd Meijer. Differential Revision: https://reviews.llvm.org/D23601 llvm-svn: 281304
2016-09-13AVX-512: Fix for PR28175 - Scalar code optimization.Elena Demikhovsky2-7/+17
Optimized (truncate (assertzext x) to i1) and anyext i1 to i8/16/32. Optimization of this patterns is a one more step towards i1 optimization on AVX-512. Differential Revision: https://reviews.llvm.org/D24456 llvm-svn: 281302
2016-09-13[AArch64] Support stackmap/patchpoint in getInstSizeInBytesDiana Picus1-4/+21
We currently return 4 for stackmaps and patchpoints, which is very optimistic and can in rare cases cause the branch relaxation pass to fail to relax certain branches. This patch causes getInstSizeInBytes to return a pessimistic estimate of the size as the number of bytes requested in the stackmap/patchpoint. In the future, we could provide a more accurate estimate by sharing some of the logic in AArch64::LowerSTACKMAP/PATCHPOINT. Fixes part of https://llvm.org/bugs/show_bug.cgi?id=28750 Differential Revision: https://reviews.llvm.org/D24073 llvm-svn: 281301
2016-09-13[X86] Remove masked shufpd/shufps intrinsics and autoupgrade to native ↵Craig Topper2-12/+26
vector shuffles. They were removed from clang previously but accidentally left in the backend. llvm-svn: 281300
2016-09-13Revert "[Support][CommandLine] Add cl::getRegisteredSubcommands()"Zachary Turner1-11/+0
This reverts r281290, as it breaks unit tests. http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/303 llvm-svn: 281292
2016-09-13[Support][CommandLine] Add cl::getRegisteredSubcommands()Dean Michael Berris1-0/+11
This should allow users of the library to get a range to iterate through all the subcommands that are registered to the global parser. This allows users to define subcommands in libraries that self-register to have dispatch done at a different stage (like main). It allows for writing code like the following: for (auto *S : cl::getRegisteredSubcommands()) { if (*S) { // Dispatch on S->getName(). } } This change also contains tests that show this usage pattern. Reviewers: zturner, dblaikie, echristo Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D24489 llvm-svn: 281290
2016-09-13DebugInfo: New metadata representation for global variables.Peter Collingbourne18-105/+153
This patch reverses the edge from DIGlobalVariable to GlobalVariable. This will allow us to more easily preserve debug info metadata when manipulating global variables. Fixes PR30362. A program for upgrading test cases is attached to that bug. Differential Revision: http://reviews.llvm.org/D20147 llvm-svn: 281284
2016-09-13[DAG] Refactor BUILD_VECTOR combine to make it easier to extend. NFCI.Michael Kuperstein1-123/+156
This should make it easier to add cases that we currently don't cover, like supporting more kinds of type mismatches and more than 2 input vectors. llvm-svn: 281283
2016-09-13X86: Conditional tail calls should not have isBarrier = 1Hans Wennborg1-18/+31
That confuses e.g. machine basic block placement, which then doesn't realize that control can fall through a block that ends with a conditional tail call. Instead, isBranch=1 should be set. Also, mark EFLAGS as used by these instructions. llvm-svn: 281281
2016-09-13Temporarily Revert "[MC] Defer asm errors to post-statement failure" as it's ↵Eric Christopher10-251/+352
causing errors on the sanitizer bots. This reverts commit r281249. llvm-svn: 281280
2016-09-12[LVI] Complete the abstract of the cache layer [NFCI]Philip Reames1-72/+94
Convert the previous introduced is-a relationship between the LVICache and LVIImple clases into a has-a relationship and hide all the implementation details of the cache from the lazy query layer. The only slightly concerning change here is removing the addition of a queried block into the SeenBlock set in LVIImpl::getBlockValue. As far as I can tell, this was effectively dead code. I think it *used* to be the case that getCachedValueInfo wasn't const and might end up inserting elements in the cache during lookup. That's no longer true and hasn't been for a while. I did fixup the const usage to make that more obvious. llvm-svn: 281272
2016-09-12[LVI] Sink a couple more cache manipulation routines into the cache itself ↵Philip Reames1-36/+45
[NFCI] The only interesting bit here is the refactor of the handle callback and even that's pretty straight-forward. llvm-svn: 281267
2016-09-12[LVI] Abstract out the actual cache logic [NFCI]Philip Reames1-89/+97
Seperate the caching logic from the implementation of the lazy analysis. For the moment, the lazy analysis impl has a is-a relationship with the cache; this will change to a has-a relationship shortly. This was done as two steps merely to keep the changes simple and the diff understandable. llvm-svn: 281266
2016-09-12Revert r281215, it caused PR30358.Nico Weber2-139/+5
llvm-svn: 281263
2016-09-12Fix the bug introduced in r281252.Dehao Chen1-1/+1
llvm-svn: 281253
2016-09-12Lower consecutive select instructions correctly.Dehao Chen1-23/+75
Summary: If consecutive select instructions are lowered separately in CGP, it will introduce redundant condition check and branches that cannot be removed by later optimization phases. This patch lowers all consecutive select instructions at the same to to avoid inefficent code as demonstrated in https://llvm.org/bugs/show_bug.cgi?id=29095 Reviewers: davidxl Subscribers: vsk, llvm-commits Differential Revision: https://reviews.llvm.org/D24147 llvm-svn: 281252
2016-09-12[MC] Defer asm errors to post-statement failureNirav Dave10-352/+251
Allow errors to be deferred and emitted as part of clean up to simplify and shorten Assembly parser code. This will allow error messages to be emitted in helper functions and be modified by the caller which has better context. As part of this many minor cleanups to the Parser: * Unify parser cleanup on error * Add Workaround for incorrect return values in ParseDirective instances * Tighten checks on error-signifying return values for parser functions and fix in-tree TargetParsers to be more consistent with the changes. * Fix AArch64 test cases checking for spurious error messages that are now fixed. These changes should be backwards compatible with current Target Parsers so long as the error status are correctly returned in appropriate functions. Reviewers: rnk, majnemer Subscribers: aemerson, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D24047 llvm-svn: 281249
2016-09-12[MCJIT] Fix some inconsistent handling of name mangling inside MCJIT.Lang Hames2-12/+21
This patch moves symbol mangling from findSymbol to getSymbolAddress. The findSymbol, findExistingSymbol and findModuleForSymbol methods now always take a mangled name, allowing the 'demangle-and-retry' cruft to be removed from findSymbol. See http://llvm.org/PR28699 for details. Patch by James Holderness. Thanks very much James! llvm-svn: 281238
2016-09-12[InstCombine] use m_APInt to allow icmp X, C folds for splat constant vectorsSanjay Patel1-2/+3
isSignBitCheck could be changed to take a pointer param to avoid the 'UnusedBit' ugliness. llvm-svn: 281231
2016-09-12AMDGPU: Do not clobber SCC in SIWholeQuadModeNicolai Haehnle2-75/+210
Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D22198 llvm-svn: 281230
2016-09-12[GlobalISel] Fix mismatched "<..)" in intrinsic MO printing. NFC.Ahmed Bougacha1-2/+2
llvm-svn: 281229
2016-09-12Revert "[ARM] Promote small global constants to constant pools"James Molloy4-123/+1
This reverts commit r281213. It made a bot go bang: http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/14625 llvm-svn: 281228
2016-09-12[BranchFolding] Unique added live-ins after hoisting code.Ahmed Bougacha1-0/+7
We're not supposed to have duplicate live-ins. llvm-svn: 281224
2016-09-12[X86] Copy imp-uses when folding tailcall into conditional branch.Ahmed Bougacha1-1/+1
r280832 added 32-bit support for emitting conditional tail-calls, but dropped imp-used parameter registers. This went unnoticed until r281113, which added 64-bit support, as this is only exposed with parameter passing via registers. Don't drop the imp-used parameters. llvm-svn: 281223
2016-09-12[FunctionAttrs] Don't try to infer returned if it is already on an argumentDavid Majnemer1-0/+5
Trying to infer the 'returned' attribute if an argument is already 'returned' can lead to verification failure: inference might determine that a different argument is passed through which would result in two different arguments marked as 'returned'. This fixes PR30350. llvm-svn: 281221
2016-09-12fix formatting; NFCSanjay Patel1-14/+13
llvm-svn: 281220
2016-09-12[InstCombine] add helper function for foldICmpUsingKnownBits; NFCISanjay Patel2-259/+279
llvm-svn: 281217
2016-09-12[AMDGPU] Assembler: Move disabled SDWA and DPP instruction into Disable asm ↵Sam Kolton2-0/+12
variant Summary: This removes disabled instructions from match tables so we will not match them at all. Reviewers: tstellarAMD, vpykhtin, artem.tamazov Subscribers: wdng, nhaehnle, arsenm Differential Revision: https://reviews.llvm.org/D24452 llvm-svn: 281216
2016-09-12[Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy2-5/+139
For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)). 1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS. 2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS. 3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS). 4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask. 1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win. llvm-svn: 281215
2016-09-12fix formatting/typos; NFCSanjay Patel2-12/+11
llvm-svn: 281214
2016-09-12[ARM] Promote small global constants to constant poolsJames Molloy4-1/+123
If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). llvm-svn: 281213
2016-09-12[LoopInterchange] Improve debug output. NFC.Chad Rosier1-2/+2
llvm-svn: 281212
2016-09-12Define a dummy zlib::uncompress when zlib is not available.Rafael Espindola1-0/+4
Should fix link errors in some bots when it is used. llvm-svn: 281208
2016-09-12GlobalISel: support translation of global addresses.Tim Northover2-0/+14
llvm-svn: 281207
2016-09-12GlobalISel: translate GEP instructions.Tim Northover2-0/+95
Unlike SDag, we use a separate G_GEP instruction (much simplified, only taking a single byte offset) to preserve the pointer type information through selection. llvm-svn: 281205
2016-09-12GlobalISel: disambiguate types when printing MIRTim Northover4-19/+56
Some generic instructions have multiple types. While in theory these always be discovered by inspecting the single definition of each generic vreg, in practice those definitions won't always be local and traipsing through a big function to find them will not be fun. So this changes MIRPrinter to print out the type of uses as well as defs, if they're known to be different or not known to be the same. On the parsing side, we're a little more flexible: provided each register is given a type in at least one place it's mentioned (and all types are consistent) we accept the MIR. This doesn't introduce ambiguity but makes writing tests manually a bit less painful. llvm-svn: 281204
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