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2016-05-03Parse the TPI (type information) stream of PDB files.Zachary Turner6-5/+179
This parses the TPI stream (stream 2) from the PDB file. This stream contains some header information followed by a series of codeview records. There is some additional complexity here in that alongside this stream of codeview records is a serialized hash table in order to efficiently query the types. We parse the necessary bookkeeping information to allow us to reconstruct the hash table, but we do not actually construct it yet as there are still a few things that need to be understood first. Differential Revision: http://reviews.llvm.org/D19840 Reviewed By: ruiu, rnk llvm-svn: 268343
2016-05-03Move llvm-readobj/StreamWriter to Support.Zachary Turner2-0/+73
We wish to re-use this from llvm-pdbdump, and it provides a nice way to print structured data in scoped format that could prove useful for many other dumping tools as well. Moving to support and changing name to ScopedPrinter to better reflect its purpose. llvm-svn: 268342
2016-05-03ThinLTO: do not import function whose linkage prevents inlining.Mehdi Amini1-2/+2
There is not point in importing a "weak" or a "linkonce" function since we won't be able to inline it anyway. We already had a targeted check for WeakAny, this is using the same check on GlobalValue as the inline, i.e. isMayBeOverriddenLinkage() From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268341
2016-05-03livePhysRegs: Pass MBB by reference in addLive{Ins|Outs}(); NFCMatthias Braun12-26/+26
The block must no be nullptr for the addLiveIns()/addLiveOuts() function. llvm-svn: 268340
2016-05-03Adding period to the end of a comment to test out commit access.Douglas Yung1-1/+1
llvm-svn: 268337
2016-05-03LivePhysRegs: Automatically determine presence of pristine regs.Matthias Braun9-28/+31
Remove the AddPristinesAndCSRs parameters from addLiveIns()/addLiveOuts(). We need to respect pristine registers after prologue epilogue insertion, Seeing that we got this wrong in at least two commits already, we should rather pay the small price to query MachineFrameInfo for it. There are three cases that did not set AddPristineAndCSRs to true even after register allocation: - ExecutionDepsFix: live-out registers are used as a hint that the register is used soon. This is not true for pristine registers so use the new addLiveOutsNoPristines() to maintain this behaviour. - SystemZShortenInst: Not setting AddPristineAndCSRs to true looks like a bug, should do the right thing automatically now. - StackMapLivenessAnalysis: Not adding pristine registers looks like a bug to me. Added a FIXME comment but maintain the current behaviour as a change may need to get coordinated with GC runtimes. llvm-svn: 268336
2016-05-02[MC] Create unique .pdata sections for every .text sectionReid Kleckner7-100/+88
Summary: This adds a unique ID to the COFF section uniquing map, similar to the one we have for ELF. The unique id is not currently exposed via the assembler because we don't have a use case for it yet. Users generally create .pdata with the .seh_* family of directives, and the assembler internally needs to produce .pdata and .xdata sections corresponding to the code section. The association between .text sections and the assembler-created .xdata and .pdata sections is maintained as an ID field of MCSectionCOFF. The CFI-related sections are created with the given unique ID, so if more code is added to the same text section, we can find and reuse the CFI sections that were already created. Reviewers: majnemer, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D19376 llvm-svn: 268331
2016-05-02[MachineBlockPlacement] Let the target optimize the branches at the end.Quentin Colombet1-0/+13
After the layout of the basic blocks is set, the target may be able to get rid of unconditional branches to fallthrough blocks that the generic code does not catch. This happens any time TargetInstrInfo::AnalyzeBranch is not able to analyze all the branches involved in the terminators sequence, while still understanding a few of them. In such situation, AnalyzeBranch can directly modify the branches if it has been instructed to do so. This patch takes advantage of that. llvm-svn: 268328
2016-05-02[X86] Model FAULTING_LOAD_OP as a terminator and branch.Quentin Colombet2-15/+10
This operation may branch to the handler block and we do not want it to happen anywhere within the basic block. Moreover, by marking it "terminator and branch" the machine verifier does not wrongly assume (because of AnalyzeBranch not knowing better) the branch is analyzable. Indeed, the target was seeing only the unconditional branch and not the faulting load op and thought it was a simple unconditional block. The machine verifier was complaining because of that and moreover, other optimizations could have done wrong transformation! In the process, simplify the representation of the handler block in the faulting load op. Now, we directly reference the handler block instead of using a label. This has the benefits of: 1. MC knows how to issue a label for a BB, so leave that to it. 2. Accessing the target BB from its label is painful, whereas it is direct from a MBB operand. Note: The 2 bytes offset in implicit-null-check.ll comes from the fact the unconditional jumps are not removed anymore, as the whole terminator sequence is not analyzable anymore. Will fix it in a subsequence commit. llvm-svn: 268327
2016-05-02DebugInfo: Avoid propagating incorrect debug locations in SelectionDAG via CSE.Wolfgang Pieb1-31/+37
Summary: When SelectionDAG performs CSE it is possible that the context's source location is different from that of the selected node. This can lead to incorrect line number records. We update the debug location to the one that occurs earlier in the instruction sequence. This fixes PR21006. Reviewers: echristo, sdmitrouk Subscribers: jevinskie, asl, llvm-commits Differential Revision: http://reviews.llvm.org/D12094 llvm-svn: 268323
2016-05-02Revert "ThinLTO: do not import function whose linkage prevents inlining."Mehdi Amini1-2/+2
This reverts commit r268315, the tests are not passing. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268317
2016-05-02[llvm-pdbdump] Fix read past EOF when file is too small.Zachary Turner1-0/+4
llvm-svn: 268316
2016-05-02ThinLTO: do not import function whose linkage prevents inlining.Mehdi Amini1-2/+2
There is not point in importing a "weak" or a "linkonce" function since we won't be able to inline it anyway. We already had a targeted check for WeakAny, this is using the same check on GlobalValue as the inline, i.e. isMayBeOverriddenLinkage() From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268315
2016-05-02Remove redundant return, NFCVedant Kumar1-1/+0
llvm-svn: 268312
2016-05-02[X86][SSE] Added placeholder for 128/256-bit wide shuffle combinesSimon Pilgrim1-6/+14
Begun adding placeholder for future support for vperm2f128/vshuff64x2 style 128/256-bit wide shuffles llvm-svn: 268306
2016-05-02Don't try to create thin bsd archives.Rafael Espindola1-0/+3
Not such variant has been specified yet. llvm-svn: 268305
2016-05-02Code refactoring -- preparation for new PM porting /NFCXinliang David Li1-9/+19
llvm-svn: 268301
2016-05-02Thread Expected<...> up from libObject’s getType() for symbols to allow ↵Kevin Enderby11-30/+81
llvm-objdump to produce a good error message. Produce another specific error message for a malformed Mach-O file when a symbol’s section index is more than the number of sections. The existing test case in test/Object/macho-invalid.test for macho-invalid-section-index-getSectionRawName now reports the error with the message indicating that a symbol at a specific index has a bad section index and that bad section index value. Again converting interfaces to Expected<> from ErrorOr<> does involve touching a number of places. Where the existing code reported the error with a string message or an error code it was converted to do the same. Also there some were bugs in the existing code that did not deal with the old ErrorOr<> return values.  So now with Expected<> since they must be checked and the error handled, I added a TODO and a comment: "// TODO: Actually report errors helpfully" and a call something like consumeError(NameOrErr.takeError()) so the buggy code will not crash since needed to deal with the Error. llvm-svn: 268298
2016-05-02AMDGPU: Custom lower v2i32 loads and storesMatt Arsenault1-7/+39
This will allow us to split up 64-bit private accesses when necessary. llvm-svn: 268296
2016-05-02AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratchTom Stellard1-2/+1
We were using v_readlane_b32 with the lane set to zero, but this won't work if thread 0 is not active. Differential Revision: http://reviews.llvm.org/D19745 llvm-svn: 268295
2016-05-02AMDGPU: Make i64 loads/stores promote to v2i32Matt Arsenault2-55/+12
Now that unaligned access expansion should not attempt to produce i64 accesses, we can remove the hack in PreprocessISelDAG where this is done. This allows splitting i64 private accesses while allowing the new add nodes indexing the vector components can be folded with the base pointer arithmetic. llvm-svn: 268293
2016-05-02[LVI] Add an API to LazyValueInfo so that it can export ConstantRangesJohn Regehr1-0/+16
that it computes. Currently this is used for testing and precision tuning, but it might be used by optimizations later. Differential Revision: http://reviews.llvm.org/D19179 llvm-svn: 268291
2016-05-02Fix instance of -Winconsistent-missing-override in AMDGPU codeReid Kleckner1-1/+1
llvm-svn: 268289
2016-05-02Revert "[SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for ↵Reid Kleckner3-177/+59
empty block including lifetime intrinsics" This reverts commit r268254. This change causes assertion failures while building Chromium. Reduced test case coming soon. llvm-svn: 268288
2016-05-02AMDGPU/SI: Set the kill flag on temp VGPRs used to restore SGPRs from scratchTom Stellard1-1/+1
Summary: When we restore an SGPR value from scratch, we first load it into a temporary VGPR and then use v_readlane_b32 to copy the value from the VGPR back into an SGPR. We weren't setting the kill flag on the VGPR in the v_readlane_b32 instruction, so the register scavenger wasn't able to re-use this temp value later. I wasn't able to create a lit test for this. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19744 llvm-svn: 268287
2016-05-02Typo. NFC.Chad Rosier1-1/+1
llvm-svn: 268280
2016-05-02Use false rather than 0 for a boolean value. NFC.Chad Rosier1-1/+1
llvm-svn: 268279
2016-05-02Fix build breakage due to implicit conversion.Zachary Turner1-1/+2
llvm-svn: 268277
2016-05-02ARM: fix handling of SUB immediates in peephole opt.Tim Northover1-12/+30
We were negating an immediate that was going to be used in a SUBri form unnecessarily. Since ADD/SUB are very similar we *can* do that, but we have to change the SUB to an ADD at the same time. This also applies to ADD, and allows us to handle a slightly larger range of immediates for those two operations. rdar://25992245 llvm-svn: 268276
2016-05-02[NVPTX] Fix sign/zero-extending ldg/ldu instruction selectionJustin Holewinski3-48/+77
Summary: We don't have sign-/zero-extending ldg/ldu instructions defined, so we need to emulate them with explicit CVTs. We were originally handling the i8 case, but not any other cases. Fixes PR26185 Reviewers: jingyue, jlebar Subscribers: jholewinski Differential Revision: http://reviews.llvm.org/D19615 llvm-svn: 268272
2016-05-02PDB - Instead of hardcoding stream numbers, use an enum.Zachary Turner2-12/+17
llvm-svn: 268270
2016-05-02[CFLAA] Fix a use-of-invalid-pointer bug.George Burgess IV1-1/+6
As shown in the diff, we used to add to CFLAA's cache by doing `Cache[Fn] = buildSetsFrom(Fn)`. `buildSetsFrom(Fn)` may cause `Cache` to reallocate its underlying storage, if this happens and `Cache[Fn]` was evaluated prior to `buildSetsFrom(Fn)`, then we'll store the result to a bad address. Patch by Jia Chen. llvm-svn: 268269
2016-05-02Parse PDB Name Hash TableZachary Turner4-0/+151
PDB has a lot of similar data structures. We already have code for parsing a Name Map, but PDB seems to have a different but very similar structure that is a hash table. This is the beginning of code needed in order to parse the name hash table, but it is not yet complete. It parses the basic metadata of the hash table, the bucket array, and the names buffer, but doesn't use any of these fields yet as the data structure requires a non-trivial amount of work to understand. llvm-svn: 268268
2016-05-02AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cppTom Stellard3-39/+51
Reviewers: arsenm Subscribers: jvesely, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19736 llvm-svn: 268267
2016-05-02ReversePostOrderFunctionAttrs is not modifying the call graph, let's ↵Mehdi Amini1-0/+1
preserve it. When running cc1 with -flto=thin, it is followed by GlobalOpt, which requires the callgraph. This saves rebuilding one. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268266
2016-05-02AMDGPU/SI: Fix bug in SIInstrInfo::insertWaitStates() uncovered by r268260Tom Stellard1-1/+2
We can't use MI->getDebugLoc() when MI is an iterator that could be MBB.end(). llvm-svn: 268265
2016-05-02AMDGPU/SI: Use the hazard recognizer to break SMEM soft clausesTom Stellard3-4/+72
Summary: Add support for detecting hazards in SMEM soft clauses, so that we only break the clauses when necessary, either by adding s_nop or re-ordering other alu instructions. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18870 llvm-svn: 268260
2016-05-02AMDGPU: llvm.SI.fs.constant is a source of divergenceNicolai Haehnle1-0/+1
Summary: This intrinsic is used to get flat-shaded fragment shader inputs. Those are uniform across a primitive, but a fragment shader wave may process pixels from multiple primitives (as indicated by the prim_mask), and so that's where divergence can arise. Reviewers: arsenm, tstellarAMD Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19747 llvm-svn: 268259
2016-05-02ScheduleDAGInstrs.cpp: Don't peel the iterator when it points the end. This ↵NAKAMURA Takumi1-1/+1
will fix the crash in r268143. llvm-svn: 268257
2016-05-02[WebAssembly] Rename memory_size intrinsic to current_memoryDerek Schuff1-9/+9
This follows the recent renaming in the wasm spec. llvm-svn: 268255
2016-05-02[SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for empty block ↵Hans Wennborg3-59/+177
including lifetime intrinsics Make it possible that TryToSimplifyUncondBranchFromEmptyBlock merges empty basic block including lifetime intrinsics as well as phi nodes and unconditional branch into its successor or predecessor(s). If successor of empty block has single predecessor, all contents including lifetime intrinsics are sinked into the successor. Otherwise, they are hoisted into its predecessor(s) and then merged into the predecessor(s). Patch by Josh Yoon <josh.yoon@samsung.com>! Differential Revision: http://reviews.llvm.org/D19257 llvm-svn: 268254
2016-05-02Move createReversePostOrderFunctionAttrsPass right after the inliner is doneMehdi Amini1-8/+8
This is where it was originally, until LoopVersioningLICM was inserted before in r259986, I don't believe it was on purpose. Differential Revision: http://reviews.llvm.org/D19809 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268252
2016-05-02[LLE] Fix typo from r263058Adam Nemet1-1/+1
This was meant to check unit stride for both the load and the store. Thanks to Roman Shirokiy for noticing this. llvm-svn: 268251
2016-05-02Fixed signed/unsigned comparison warning.Simon Pilgrim1-1/+1
llvm-svn: 268249
2016-05-02AMDGPU/SI: Use hazard recognizer to detect DPP hazardsTom Stellard3-55/+27
Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D18603 llvm-svn: 268247
2016-05-02[X86][SSE] Dropped X86ISD::FGETSIGNx86 and use MOVMSK instead for FGETSIGN ↵Simon Pilgrim4-37/+12
lowering movmsk.ll tests are unchanged. llvm-svn: 268237
2016-05-02Cleanup comments. NFC.Chad Rosier2-3/+4
llvm-svn: 268236
2016-05-02Cleanup comments. NFC.Chad Rosier1-4/+3
llvm-svn: 268235
2016-05-02Silence unused variable warnings; NFC.Aaron Ballman1-9/+4
llvm-svn: 268234
2016-05-02Cleanup comments. NFC.Chad Rosier1-7/+9
llvm-svn: 268233
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