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as a target-agnostic implementation to replace target-specific
XXXMCExpr::create.
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Add a hook printSpecifierExpr so that targets can implement
relocation specifier printing without inheriting from MCSpecifierExpr.
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Reduce direct uses of SparcMCExpr, facilitating transition to
MCSpecifierExpr in the future.
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Many targets define MCTargetExpr subclasses just to encode an expression
with a relocation specifier. Create a generic MCSpecifierExpr to be
inherited instead. Migrate M68k and SPARC as examples.
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* Move implementations out-of-line to align with other backends.
* clang-format the class.
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Reviewers: rorth, brad0, s-barannikov
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/138403
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These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
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MCAsmLexer.h has been made a forwarder header since #134207
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Replace MCSymbol argument with MCValue::AddSym. The minor difference in
.weakref handling is negligible, as our implementation may not fully
align with GAS, and .weakref is not used in practice.
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Additionally, swap MCFixup/MCValue order to match addReloc/recordRelocation.
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Prepare for removing MCContext from getRelocType functions.
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Remove the MCSubtargetInfo argument from applyFixup, introduced in
https://reviews.llvm.org/D45962 , as it's only required by ARM. Instead,
add const MCFragment & so that ARMAsmBackend can retrieve
MCSubtargetInfo via a static member function.
Additionally, remove the MCAssembler argument, which is also only
required by ARM.
Additionally, make applyReloc non-const. Its arguments now fully cover
addReloc's functionality.
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Reviewers: brad0, s-barannikov, arsenm, rorth
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/135718
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For IsPCRel fixups, we had the `A->getKind() != MCSymbolRefExpr::VK_None`
condition to force relocations. The condition has then been changed to
`Target.getSpecifier()` (086af836889436baffc71c743c7c8259bad8ed60).
38c3ad36be1facbe6db2dede7e93c0f12fb4e1dc updated
shouldForceRelocation to test `Target.getSpecifier`.
It is not a good fit as many targets with %lo/%hi style specifiers
(SPARC, MIPS, PowerPC, RISC-V) do not force relocations for these
specifiers.
Revert the Target.getSpecifier implementation
(38c3ad36be1facbe6db2dede7e93c0f12fb4e1dc) and update
targets that need it (SystemZAsmBackend/X86AsmBackend) instead.
Targets need customization might define addReloc instead.
Note: The X86AsmBackend implementation is too conservative.
GNU Assembler doesn't emit a relocation for `call local@plt; local`
a3d39316764726ed9fd939550c7781199b1eb77e added missing coverage
for GOT/PLT related relocations.
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This reverts commit 6f6dc1f239433393c0b09430193beb85d03464c8.
Resulted in several bot failures.
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Revert the Target.getSpecifier implementation
(38c3ad36be1facbe6db2dede7e93c0f12fb4e1dc) and update SystemZAsmBackend
instead.
Many targets with %lo/%hi style specifiers (SPARC, MIPS, PowerPC,
RISC-V) do not force relocations for these specifiers.
Additionally, with the introduction of the addReloc hook,
shouldForceRelocation is not that necessary and should probably be
phased out.
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Similar to https://reviews.llvm.org/D93241, print target addresses
instead of raw offset values when disassembling branches and calls.
Should fix https://github.com/llvm/llvm-project/issues/122196 and
https://github.com/llvm/llvm-project/issues/139284.
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This matches the underlying function in MachineMemOperand and how it is
printed when BaseAlign differs from Align.
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This is in prep for OSA2011 instruction definitions, which has a CBCond
instruction family.
Reviewers: rorth, s-barannikov, brad0
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/138402
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Reviewers: rorth, s-barannikov, brad0
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/138401
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Reviewers: rorth, s-barannikov, brad0
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/138400
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Register assembly printer passes in the pass registry.
This makes it possible to use `llc -start-before=<target>-asm-printer ...` in tests.
Adds a `char &ID` parameter to the AssemblyPrinter constructor to allow
targets to use the `INITIALIZE_PASS` macros and register the pass in the
pass registry. This currently has a default parameter so it won't break
any targets that have not been updated.
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Part of #119709.
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Essentially revert the evaluateAsRelocatableImpl part from
f39696e7dee4f1dce8c10d2b17f987643c480895. Ensure that absolute
relocation evaluation is in one place. SparcAsmBackend.cpp enables
better diagnostics if needed.
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The computed R_SPARC_HIX22/R_SPARC_LOX10 value is non-zero even when the
input is 0. We should suppress applyFixup when a relocation is
generated.
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Similar to f39696e7dee4f1dce8c10d2b17f987643c480895
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Similar to f39696e7dee4f1dce8c10d2b17f987643c480895
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The simm13 format OR instruction should use one single fixup kind, while
it currently uses a lot more, including %m44/%l44.
This change refactors R_SPARC_H44/R_SPARC_M44/R_SPARC_M44 handling to
remove fixup kinds and specifiers. We utilize the [0,
FirstLiteralRelocationKind) MCFixupKind range to encode raw relocation
types that may be resolved (see the MCAssembler.cpp change).
The `evaluateAsRelocatableImpl` implementation resembles
PPCMCExpr::evaluateAsRelocatableImpl.
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To fix uninitialized value with an invalid encoding.
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Instead of determining the relocation type during SparcMCExpr
construction (in AsmParser or AsmPrinter), use fixup_sparc_call30 and
expand it to either R_SPARC_WDISP30 or R_SPARC_WPLT30.
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Similar to https://reviews.llvm.org/D152311 for RISCV.
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relocations (#137915)
1bfc5e7 introduced support for `%gdop_hix22()` and `%gdop_lox10()`.
However, it incorrectly mapped them to `R_SPARC_GOTDATA_HIX22` and
`R_SPARC_GOTDATA_LOX10`. They should in fact emit
`R_SPARC_GOTDATA_OP_HIX22` and `R_SPARC_GOTDATA_OP_LOX10`.
This became a problem when assembling glibc's PIC startup code:
```asm
sethi %gdop_hix22(main), %o0
xor %o0, %gdop_lox10(main), %o0
ldx [%l7 + %o0], %o0, %gdop(main)
```
After the `xor`, `%o0` should contain the GOT offset for `main`, but
because of the incorrect relocations, it actually ends up containing the
address of `main`, which of course makes the following `ldx` fail.
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I think 9fc29098dfa684de53dd180aa93e94c39c388631 (2014) was misguided
and added the unneeded special case. It probably wanted to handle
R_SPARC_WPLT30/R_SPARC_WDISP30 in PDC/PIC but it's not correct
to check the property in AsmParser.
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absolute symbol
https://reviews.llvm.org/D47136 did not correctly handle `ld [%i0 + abs], %o0; abs = 7`
To fix it and make fixup handling less hacky,
* Change TableGen MEMri to use simm13Op instead of i32imm
* Emit a fixup of kind fixup_sparc_13 in SparcMCCodeEmitter::getSImm13OpValue
* Convert fixup_sparc_13 to either R_SPARC_13/R_SPARC_GOT13 in getRelocType
This postpones 13/GOT13 decision to relocation generation, ensuring that
we suppress the relocation when referencing an absolute symbol, matching
gas.
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Make the style similar to LoongArch/RISCV.
Remove comment "FIXME: use %got22/%got10, if system assembler supports them."
%got22/%got10 are not available in gas.
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From SPARC T3 Supplement to the UltraSPARC Architecture 2007 Specification:
> T3 SPARC core has a new 9 stage floating point pipeline and added Fused
> Multiply-Add (FMADD) instruction and VIS 3.0 Instructions compared to
> UltraSPARC T2/T2+.
Reviewers: rorth, s-barannikov, brad0
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/138399
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Reviewers: brad0, rorth, s-barannikov
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/138398
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`call local` should perform STT_SECTION adjustment as well as `call .Ltmp0`.
The early support 9fc29098dfa684de53dd180aa93e94c39c388631 from 2014 was
confused.
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As described in #136088 (for RISC-V), the `llvm-mc -show-encoding`
output no longer displays descriptive fixup names. Just remove
-show-encoding.
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