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2025-06-15MC: Add MCSpecifierExpr::createFangrui Song6-25/+11
as a target-agnostic implementation to replace target-specific XXXMCExpr::create.
2025-06-13MC,SPARC: Replace SparcMCExpr with MCSpecifierExprFangrui Song5-19/+18
Add a hook printSpecifierExpr so that targets can implement relocation specifier printing without inheriting from MCSpecifierExpr.
2025-06-13SPARC: Simplify SparcMCExprFangrui Song7-42/+39
Reduce direct uses of SparcMCExpr, facilitating transition to MCSpecifierExpr in the future.
2025-06-07MC: Add MCSpecifierExpr to unify target MCExprsFangrui Song3-30/+5
Many targets define MCTargetExpr subclasses just to encode an expression with a relocation specifier. Create a generic MCSpecifierExpr to be inherited instead. Migrate M68k and SPARC as examples.
2025-06-07SPARC: Modernize AsmBackendFangrui Song1-154/+151
* Move implementations out-of-line to align with other backends. * clang-format the class.
2025-05-29[SPARC][IAS] Add definitions for OSA 2011 instructionsKoakuma9-3/+223
Reviewers: rorth, brad0, s-barannikov Reviewed By: s-barannikov Pull Request: https://github.com/llvm/llvm-project/pull/138403
2025-05-26[llvm] Remove unused includes (NFC) (#141526)Kazu Hirata1-2/+0
These are identified by misc-include-cleaner. I've filtered out those that break builds. Also, I'm staying away from llvm-config.h, config.h, and Compiler.h, which likely cause platform- or compiler-specific build failures.
2025-05-25Replace #include MCAsmLexer.h with AsmLexer.hFangrui Song1-1/+1
MCAsmLexer.h has been made a forwarder header since #134207
2025-05-24MCELFObjectTargetWriter::needsRelocateWithSymbol: Remove MCSymbol argumentFangrui Song1-3/+1
Replace MCSymbol argument with MCValue::AddSym. The minor difference in .weakref handling is negligible, as our implementation may not fully align with GAS, and .weakref is not used in practice.
2025-05-24ELFObjectWriter: Remove the MCContext argument from getRelocTypeFangrui Song1-4/+3
Additionally, swap MCFixup/MCValue order to match addReloc/recordRelocation.
2025-05-24ARM,Sparc: Avoid using the MCContext & argumentFangrui Song1-2/+2
Prepare for removing MCContext from getRelocType functions.
2025-05-23MCAsmBackend: Simplify applyFixup (#141333)Fangrui Song1-3/+2
Remove the MCSubtargetInfo argument from applyFixup, introduced in https://reviews.llvm.org/D45962 , as it's only required by ARM. Instead, add const MCFragment & so that ARMAsmBackend can retrieve MCSubtargetInfo via a static member function. Additionally, remove the MCAssembler argument, which is also only required by ARM. Additionally, make applyReloc non-const. Its arguments now fully cover addReloc's functionality.
2025-05-23[SPARC] Use op-then-halve instructions when we have VIS3Koakuma2-2/+28
Reviewers: brad0, s-barannikov, arsenm, rorth Reviewed By: arsenm Pull Request: https://github.com/llvm/llvm-project/pull/135718
2025-05-23[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)Rahul Joshi1-2/+1
2025-05-22[MC] Restore MCAsmBackend::shouldForceRelocation to falseFangrui Song1-6/+0
For IsPCRel fixups, we had the `A->getKind() != MCSymbolRefExpr::VK_None` condition to force relocations. The condition has then been changed to `Target.getSpecifier()` (086af836889436baffc71c743c7c8259bad8ed60). 38c3ad36be1facbe6db2dede7e93c0f12fb4e1dc updated shouldForceRelocation to test `Target.getSpecifier`. It is not a good fit as many targets with %lo/%hi style specifiers (SPARC, MIPS, PowerPC, RISC-V) do not force relocations for these specifiers. Revert the Target.getSpecifier implementation (38c3ad36be1facbe6db2dede7e93c0f12fb4e1dc) and update targets that need it (SystemZAsmBackend/X86AsmBackend) instead. Targets need customization might define addReloc instead. Note: The X86AsmBackend implementation is too conservative. GNU Assembler doesn't emit a relocation for `call local@plt; local` a3d39316764726ed9fd939550c7781199b1eb77e added missing coverage for GOT/PLT related relocations.
2025-05-22Revert "[MC] Restore MCAsmBackend::shouldForceRelocation to false"JP Lehr1-0/+6
This reverts commit 6f6dc1f239433393c0b09430193beb85d03464c8. Resulted in several bot failures.
2025-05-21[MC] Restore MCAsmBackend::shouldForceRelocation to falseFangrui Song1-6/+0
Revert the Target.getSpecifier implementation (38c3ad36be1facbe6db2dede7e93c0f12fb4e1dc) and update SystemZAsmBackend instead. Many targets with %lo/%hi style specifiers (SPARC, MIPS, PowerPC, RISC-V) do not force relocations for these specifiers. Additionally, with the introduction of the addReloc hook, shouldForceRelocation is not that necessary and should probably be phased out.
2025-05-19[SPARC] Print target address when disassembling branches and calls (#140340)Koakuma4-6/+59
Similar to https://reviews.llvm.org/D93241, print target addresses instead of raw offset values when disassembling branches and calls. Should fix https://github.com/llvm/llvm-project/issues/122196 and https://github.com/llvm/llvm-project/issues/139284.
2025-05-16[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)Craig Topper1-7/+5
This matches the underlying function in MachineMemOperand and how it is printed when BaseAlign differs from Align.
2025-05-12[SPARC][IAS][NFC] Rename CBCOND -> CPBCONDKoakuma3-6/+6
This is in prep for OSA2011 instruction definitions, which has a CBCond instruction family. Reviewers: rorth, s-barannikov, brad0 Reviewed By: s-barannikov Pull Request: https://github.com/llvm/llvm-project/pull/138402
2025-05-12[SPARC][IAS] Add definitions for UA 2007 instructionsKoakuma4-3/+46
Reviewers: rorth, s-barannikov, brad0 Reviewed By: s-barannikov Pull Request: https://github.com/llvm/llvm-project/pull/138401
2025-05-12[SPARC][IAS] Add definitions for UA 2005 instructionsKoakuma3-4/+42
Reviewers: rorth, s-barannikov, brad0 Reviewed By: s-barannikov Pull Request: https://github.com/llvm/llvm-project/pull/138400
2025-05-06Register assembly printer passes (#138348)Matthias Braun3-1/+11
Register assembly printer passes in the pass registry. This makes it possible to use `llc -start-before=<target>-asm-printer ...` in tests. Adds a `char &ID` parameter to the AssemblyPrinter constructor to allow targets to use the `INITIALIZE_PASS` macros and register the pass in the pass registry. This currently has a default parameter so it won't break any targets that have not been updated.
2025-05-06 [SPARC] Use op-then-neg instructions when we have VIS3 (#138603)Koakuma3-0/+16
2025-05-06[Sparc] TableGen-erate SDNode descriptions (#138450)Sergei Barannikov9-90/+69
Part of #119709.
2025-05-05Sparc: Move H44/M44/L44 computation back to adjustFixupValueFangrui Song2-20/+7
Essentially revert the evaluateAsRelocatableImpl part from f39696e7dee4f1dce8c10d2b17f987643c480895. Ensure that absolute relocation evaluation is in one place. SparcAsmBackend.cpp enables better diagnostics if needed.
2025-05-05Sparc: Suppress applyFixup when a relocation is generatedFangrui Song1-2/+1
The computed R_SPARC_HIX22/R_SPARC_LOX10 value is non-zero even when the input is 0. We should suppress applyFixup when a relocation is generated.
2025-05-04Sparc: Remove VK_LO/VK_HI and replace enum Specifier with uint16_tFangrui Song5-117/+91
2025-05-04Sparc: Remove specifiers for HH22/HM10/LM22, TLS, and DISP32Fangrui Song8-174/+129
2025-05-04Sparc: Remove fixup kinds for HH22/HM10/LM22 / HI22/LO10/HIX22/LOX10Fangrui Song4-58/+36
2025-05-04Sparc: Remove specifiers for GOTDATA_OPFangrui Song3-15/+9
2025-05-04Sparc: Remove fixup kinds for WDISP16/WDISP19/WDISP22Fangrui Song4-38/+21
Similar to f39696e7dee4f1dce8c10d2b17f987643c480895
2025-05-04[llvm] Remove unused local variables (NFC) (#138478)Kazu Hirata1-3/+0
2025-05-04Sparc: Remove fixup kinds and specifiers for GOT10/GOT13/GOT22/PC10/PC22Fangrui Song8-61/+49
Similar to f39696e7dee4f1dce8c10d2b17f987643c480895
2025-05-04Sparc: Remove fixup kinds and specifiers for H44/M44/L44Fangrui Song7-60/+49
The simm13 format OR instruction should use one single fixup kind, while it currently uses a lot more, including %m44/%l44. This change refactors R_SPARC_H44/R_SPARC_M44/R_SPARC_M44 handling to remove fixup kinds and specifiers. We utilize the [0, FirstLiteralRelocationKind) MCFixupKind range to encode raw relocation types that may be resolved (see the MCAssembler.cpp change). The `evaluateAsRelocatableImpl` implementation resembles PPCMCExpr::evaluateAsRelocatableImpl.
2025-05-04SparcDisassembler: Ensure Size is initializedFangrui Song1-9/+3
To fix uninitialized value with an invalid encoding.
2025-05-04Simplify R_SPARC_WDISP30 and R_SPARC_WPLT30 handlingFangrui Song9-32/+11
Instead of determining the relocation type during SparcMCExpr construction (in AsmParser or AsmPrinter), use fixup_sparc_call30 and expand it to either R_SPARC_WDISP30 or R_SPARC_WPLT30.
2025-05-04Sparc: Remove unused VK_13. NFCFangrui Song2-3/+0
2025-05-04Sparc: Merge SparcMCInstLower.cpp into SparcAsmPrinter.cppFangrui Song4-108/+68
Similar to https://reviews.llvm.org/D152311 for RISCV.
2025-05-04Sparc: Format class SparcAsmPrinter. NFCFangrui Song1-24/+24
2025-05-04Sparc: Don't build SparcMCExpr with a zero specifierFangrui Song2-16/+6
2025-05-04[SPARC][MC] Fix `%gdop_hix22()` and `%gdop_lox10()` to use correct ↵Alex Rønne Petersen5-31/+16
relocations (#137915) 1bfc5e7 introduced support for `%gdop_hix22()` and `%gdop_lox10()`. However, it incorrectly mapped them to `R_SPARC_GOTDATA_HIX22` and `R_SPARC_GOTDATA_LOX10`. They should in fact emit `R_SPARC_GOTDATA_OP_HIX22` and `R_SPARC_GOTDATA_OP_LOX10`. This became a problem when assembling glibc's PIC startup code: ```asm sethi %gdop_hix22(main), %o0 xor %o0, %gdop_lox10(main), %o0 ldx [%l7 + %o0], %o0, %gdop(main) ``` After the `xor`, `%o0` should contain the GOT offset for `main`, but because of the incorrect relocations, it actually ends up containing the address of `main`, which of course makes the following `ldx` fail.
2025-05-04[Sparc] Remove unused parameter (NFC)Sergei Barannikov1-5/+3
2025-05-03Sparc: Remove fishy VK_WPLT30 special caseFangrui Song1-2/+0
I think 9fc29098dfa684de53dd180aa93e94c39c388631 (2014) was misguided and added the unneeded special case. It probably wanted to handle R_SPARC_WPLT30/R_SPARC_WDISP30 in PDC/PIC but it's not correct to check the property in AsmParser.
2025-05-03Sparc: Refactor R_SPARC_13/R_SPARC_GOT13 handling and fix a bug referencing ↵Fangrui Song4-24/+17
absolute symbol https://reviews.llvm.org/D47136 did not correctly handle `ld [%i0 + abs], %o0; abs = 7` To fix it and make fixup handling less hacky, * Change TableGen MEMri to use simm13Op instead of i32imm * Emit a fixup of kind fixup_sparc_13 in SparcMCCodeEmitter::getSImm13OpValue * Convert fixup_sparc_13 to either R_SPARC_13/R_SPARC_GOT13 in getRelocType This postpones 13/GOT13 decision to relocation generation, ensuring that we suppress the relocation when referencing an absolute symbol, matching gas.
2025-05-03Sparc: Modernize getSpecifierName. NFCFangrui Song3-54/+52
Make the style similar to LoongArch/RISCV. Remove comment "FIXME: use %got22/%got10, if system assembler supports them." %got22/%got10 are not available in gas.
2025-05-04[SPARC] Mark Niagara3 as VIS3-capableKoakuma1-1/+1
From SPARC T3 Supplement to the UltraSPARC Architecture 2007 Specification: > T3 SPARC core has a new 9 stage floating point pipeline and added Fused > Multiply-Add (FMADD) instruction and VIS 3.0 Instructions compared to > UltraSPARC T2/T2+. Reviewers: rorth, s-barannikov, brad0 Reviewed By: s-barannikov Pull Request: https://github.com/llvm/llvm-project/pull/138399
2025-05-04[SPARC][IAS][NFC] Tidy up LDSTUB and 64-bit mul/div instruction definitionsKoakuma2-43/+19
Reviewers: brad0, rorth, s-barannikov Reviewed By: s-barannikov Pull Request: https://github.com/llvm/llvm-project/pull/138398
2025-05-03Sparc: Remove incorrect STT_SECTION adjustment special case for WPLT30Fangrui Song1-11/+4
`call local` should perform STT_SECTION adjustment as well as `call .Ltmp0`. The early support 9fc29098dfa684de53dd180aa93e94c39c388631 from 2014 was confused.
2025-05-03Sparc: Remove TLS fixup kinds that map to relocationtypesFangrui Song4-132/+18
As described in #136088 (for RISC-V), the `llvm-mc -show-encoding` output no longer displays descriptive fixup names. Just remove -show-encoding.