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path: root/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
AgeCommit message (Expand)AuthorFilesLines
2026-01-08[RISC-V] Ensure MCTargetStreamer is initialized. (#174800)Francesco Petrogalli1-0/+2
2026-01-08[RISC-V][ELF] Move emitNoteGnuPropertySection to RISCVTargetELFStreamer. [NFC...Francesco Petrogalli1-2/+4
2025-12-11[RISCV] Add an OperandType to VMaskOp. NFC (#171926)Craig Topper1-2/+2
2025-10-14[RISCV] Support XSfmm LLVM IR and CodeGen (#143069)Brandon Wu1-0/+6
2025-09-02[RISCV] Simplify interface of RISCVAsmPrinter::lowerToMCInst [nfc] (#156482)Philip Reames1-27/+15
2025-08-22[RISCV] Add initial assembler/MC layer support for big-endian (#146534)Djordje Todorovic1-0/+2
2025-07-25[RISCV] Merge some of the C_*_HINT instruction into the regular C_* instructi...Craig Topper1-1/+1
2025-07-07[RISCV] Use cached SubtargetInfo in AsmPrinter (NFC) (#147269)Petr Vesely1-17/+8
2025-06-25[RISCV] Remove -mattr=+no-rvc-hints (#145138)Craig Topper1-1/+1
2025-06-23[RISCV][NFC] Remove hasStdExtCOrZca (#145139)Sam Elliott1-5/+5
2025-06-17[llvm] annotate interfaces in llvm/Target for DLL export (#143615)Andrew Rogers1-1/+3
2025-06-15RISCV: Replace RISCVMCExpr with MCSpecifierExprFangrui Song1-5/+5
2025-06-15RISCV: Replace MCExpr::print with MCAsmInfo::printExprFangrui Song1-1/+1
2025-06-15RISCV: Move RISCVMCExpr functions to RISCVMCAsmInfo or RISCVMCAsmBackendFangrui Song1-1/+1
2025-06-15RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_Fangrui Song1-5/+5
2025-06-12[RISCV] Remove implicit $vl def on vleNff pseudos (#143935)Luke Lau1-1/+1
2025-05-17RISCV: Replace most Specifier constants with relocation typesFangrui Song1-14/+14
2025-05-14[RISCV] Emit .note.gnu.property section when Zicfiss-based shadow stack is en...Ming-Yi Lai1-1/+14
2025-05-06Register assembly printer passes (#138348)Matthias Braun1-1/+10
2025-03-20[RISCV] Rename VariantKind to SpecifierFangrui Song1-1/+1
2025-03-17Rename RISCVMCExpr::VK_RISCV_ to VK_. NFCFangrui Song1-20/+20
2025-03-05[MC] Remove unneeded VK_None argument from MCSymbolRefExpr::create. NFCFangrui Song1-7/+4
2025-02-07[RISCV] Fix typos discovered by codespell (NFC) (#126191)Sudharsan Veeravalli1-1/+1
2024-12-10[XRay][RISCV] RISCV support for XRay (#117368)Min-Yih Hsu1-0/+82
2024-11-11[RISCV] Remove unused includes (NFC) (#115814)Kazu Hirata1-2/+0
2024-10-18[RISCV] Inline Assembly: RVC constraint and N modifier (#112561)Sam Elliott1-0/+8
2024-10-10[RISCV] Use RISCVAsmPrinter::EmitToStreamer for EmitHwasanMemaccessSymbols. (...Craig Topper1-81/+103
2024-10-09[RISCV] Use MCStreamer::emitInstruction instead of calling AsmPrinter::EmitTo...Craig Topper1-1/+1
2024-10-08[RISCV] Use the MCStreamer reference passed to RISCVAsmPrinter::EmitToStreame...Craig Topper1-1/+1
2024-10-08[RISC-V][HWASAN] Fix incorrect comments (#103728)Samuel Holland1-2/+2
2024-09-09[RISCV] Support the large code model. (#70308)Jim Lin1-0/+23
2024-09-05[CodeGen] Add generic INIT_UNDEF pseudo (#106744)Nikita Popov1-5/+0
2024-08-26[RISCV] Mark symbols used in inline asm for relocations as referenced (#104925)Anton Sidorenko1-0/+9
2024-07-30[RISCV] Rename merge operand -> passthru. NFC (#100330)Luke Lau1-1/+1
2024-07-29[AsmPrinter] Don't EmitToStreamer instructions lowered by tblgenned code (#10...Sergei Barannikov1-4/+5
2024-06-28[IR] Don't include Module.h in Analysis.h (NFC) (#97023)Nikita Popov1-0/+1
2024-04-23[RISCV] Split code that tablegen needs out of RISCVISAInfo. (#89684)Craig Topper1-1/+1
2024-04-11[RISCV] Implement Statepoint and Patchpoint lowering to call instructions (#7...Sacha Coppey1-0/+57
2024-04-10[RISCV] Make EmitToStreamer return whether Inst is compressedPengcheng Wang1-2/+4
2024-03-20[RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (#85155)Craig Topper1-4/+28
2024-02-06[RISCV] Use hasStdExtCOrZca instead of FeatureStdExtC to determine NOP size i...Craig Topper1-3/+3
2024-01-23[RISCV] Support TLSDESC in the RISC-V backend (#66915)Paul Kirth1-0/+12
2024-01-22[RISCV] Teach RISCVMergeBaseOffset to handle inline asm (#78945)Wang Pengcheng1-2/+3
2024-01-07[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)Fangrui Song1-3/+0
2024-01-06Revert "[RISCV] Refactor subreg indices. (#77173)"Craig Topper1-3/+3
2024-01-06[RISCV] Refactor subreg indices. (#77173)Craig Topper1-3/+3
2023-10-11[RISCV] Add Stackmap/Statepoint/Patchpoint support without targetsSacha Coppey1-0/+87
2023-09-19[RISCV] Fix inline asm error for block address (#66640)Wang Pengcheng1-2/+2
2023-09-18[RISCV] Only emit .option when extension is supportedPiyou Chen1-13/+10
2023-08-31Revert "[RISCV] Teach RISCVMergeBaseOffset to handle inline asm"Nick Desaulniers1-2/+2
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