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AgeCommit message (Expand)AuthorFilesLines
2026-01-13[CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subr...Christudasan Devadasan2-1/+2
2026-01-12[LoongArch] Disable strict node mutation to fix strict FP lowering crash (#17...hev1-0/+3
2026-01-11[TargetLowering] Change the `softPromoteHalfType` default to `true` (#175149)Trevor Gross1-2/+0
2025-12-20[LoongArch] Use getShiftAmountConstant. NFCCraig Topper1-1/+1
2025-12-20[LoongArch] Fix assertion when combining SETCC with wide constants (#172975)hev1-2/+2
2025-12-18[LoongArch][NFC] Partial revert "Custom lowering for vector logical right shi...WANG Rui4-81/+24
2025-12-18[LoongArch] Fix OptimizeW crash when MI operand is not a virtual register (#1...hev1-1/+2
2025-12-16[CodeGen] expand-fp: Change frem expansion criterion (#158285)Frederik Harwath1-2/+2
2025-12-11[LoongArch] Add support for the ud macro instruction (#171583)hev3-7/+46
2025-12-10[LoongArch] Custom lowering for vector logical right shifts of integers (#171...hev4-24/+81
2025-12-02[NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter ...Robert Imschweiler2-2/+2
2025-11-28[LoongArch] Make rotl/rotr custom for lsx/lasx (#161154)Zhaoxin Yang4-0/+70
2025-11-26CodeGen: Make all targets override pseudos with pointers (#159881)Matt Arsenault1-0/+2
2025-11-25[LoongArch][DAGCombiner] Combine vand (vnot ..) to vandn (#161037)Zhaoxin Yang3-26/+175
2025-11-25[LoongArch] Fix for `VLDREPL` node validation (#168993)ZhaoQi3-18/+7
2025-11-20[LoongArch] TableGen-erate SDNode descriptions (#168129)Sergei Barannikov13-303/+141
2025-11-19CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)Matt Arsenault1-1/+1
2025-11-12Reland "[LoongArch] Add `isSafeToMove` hook to prevent unsafe instruction mot...hev2-18/+30
2025-11-11Revert "[LoongArch] Add `isSafeToMove` hook to prevent unsafe instruction mot...hev2-30/+18
2025-11-10CodeGen: Remove TRI arguments from stack load/store hooks (#158240)Matt Arsenault3-13/+11
2025-11-10CodeGen: Remove TRI argument from getRegClass (#158225)Matt Arsenault1-2/+1
2025-11-10CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)Matt Arsenault4-5/+8
2025-11-10[LoongArch] Initial implementation for `enableMemCmpExpansion` hook (#166526)ZhaoQi2-2/+24
2025-11-07[LoongArch] Add `isSafeToMove` hook to prevent unsafe instruction motion (#16...hev2-18/+30
2025-11-06[LoongArch] Override hooks to enable sink-and-fold support in MachineSink (#1...ZhaoQi3-1/+163
2025-11-05[llvm][LoongArch] Introduce LASX and LSX conversion intrinsics (#157818)hev2-0/+36
2025-11-03[LoongArch] Make fminnum/fmaxnum legal for lsx/lasx (#162768)Zhaoxin Yang3-0/+12
2025-11-02[llvm] Use "= default" (NFC) (#166088)Kazu Hirata2-2/+2
2025-11-01[LoongArch] Make ceil,floor,trunc,roundeven legal for lsx/lasx (#165217)Zhaoxin Yang3-0/+19
2025-10-31[LoongArch] Add patterns to support vector type average instructions generati...ZhaoQi2-0/+48
2025-10-31[LoongArch] Lowering flog2 to flogb (#162978)Zhaoxin Yang5-2/+16
2025-10-27[LoongArch] Optimize for reversing vector using shufflevector (#163151)ZhaoQi1-0/+43
2025-10-25[llvm] Make getEffectiveRelocModel helper consistent across targets. NFC (#16...Sam Clegg1-3/+2
2025-10-23[LoongArch] Move widenShuffleMask before lowerVECTOR_SHUFFLE_XVPERMI to impro...Zhaoxin Yang1-0/+3
2025-10-20[LoongArch] Lowering vector abs to [x]vsigncov (#162595)Zhaoxin Yang2-8/+8
2025-10-13[llvm][LoongArch] Replace unnecessary ZERO_EXTEND to ANY_EXTEND (#162593)Zhaoxin Yang1-1/+1
2025-10-03[llvm][LoongArch] Fix compiler warning produced by assertDavid Spickett1-2/+1
2025-09-30[LoongArch] Add R_LARCH_MARK_LA relocation for la.abswanglei3-1/+11
2025-09-30[LoongArch] Custom legalize vector_shuffle to `xvinsve0.{w/d}` when possible ...ZhaoQi3-0/+61
2025-09-29[LoongArch] Override cost hooks to expose more DAG combine opportunities (#15...ZhaoQi2-0/+20
2025-09-29[LoongArch] Add option for merge base offset passwanglei1-1/+6
2025-09-28[LoongArch] Add patterns to support `[x]vadda.{b/h/w/d}` generation (#160674)ZhaoQi3-0/+34
2025-09-26[LoongArch] Generate [x]vldi instructions with special constant splats (#159258)Zhaoxin Yang4-21/+125
2025-09-26[LoongArch] Custom legalize vector_shuffle to xvpermi.d when possible (#160429)ZhaoQi1-9/+30
2025-09-26[LoongArch] Refine 256-bit vector_shuffle legalization for LASX (#160254)ZhaoQi1-32/+47
2025-09-26[LoongArch] Override shouldScalarizeBinop to enable `extract(binop)->binop(ex...ZhaoQi2-0/+21
2025-09-26[LoongArch] Support vector types for hasAndNot to enable more DAG combines (#...ZhaoQi1-2/+6
2025-09-25[LoongArch] Enable more vector tests for 32-bit target (#160656)hev2-29/+140
2025-09-23[CodeGen] Rename isReallyTriviallyReMaterializable [nfc]Philip Reames1-1/+1
2025-09-22[LoongArch] Custom legalizing ConstantFP to avoid float loads (#158050)ZhaoQi4-0/+144
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