aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
AgeCommit message (Expand)AuthorFilesLines
2025-12-26[AMDGPU] Make SIShrinkInstructions pass return valid changed state (#168833)Vikram Hegde1-38/+65
2025-11-15[AMDGPU] When shrinking and/or to bitset*, remove implicit scc def (#168128)LU-JOHN1-1/+1
2025-11-14[AMDGPU] Ensure SCC is not live before shrinking to s_bitset* (#167907)LU-JOHN1-2/+4
2025-09-23[AMDGPU] Skip debug instructions in SIShrinkInstructions::matchSwap (#160123)Jay Foad1-1/+6
2025-07-14[AMDGPU] Codegen support for v_fmaak_f64/f_fmamk_f64 (#148734)Stanislav Mekhanoshin1-1/+11
2025-07-14[AMDGPU] Use 64-bit literals in codegen on gfx1250 (#148727)Stanislav Mekhanoshin1-1/+5
2025-06-27[Target] Use range-based for loops (NFC) (#146198)Kazu Hirata1-4/+1
2025-05-30AMDGPU: Directly check if shrink-instructions run is post-RA (#142009)Matt Arsenault1-7/+7
2025-05-23[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)Rahul Joshi1-7/+3
2025-05-20Revert "[AMDGPU] remove move instruction if there is no user of it (#136735)"Shilei Tian1-1/+1
2025-05-04[llvm] Remove unused local variables (NFC) (#138467)Kazu Hirata1-2/+0
2025-05-03[AMDGPU] remove move instruction if there is no user of it (#136735)Baoshan1-1/+1
2025-03-28[AMDGPU] Unused sdst writing to null (#133229)Ana Mihajlovic1-4/+6
2025-02-19[AMDGPU][True16][CodeGen] true16 codegen pattern for fma (#127240)Brox Chen1-4/+13
2025-02-14Revert "[AMDGPU][True16][CodeGen] true16 codegen pattern for fma (#12… (#12...Brox Chen1-13/+4
2025-02-14[AMDGPU][True16][CodeGen] true16 codegen pattern for fma (#122950)Brox Chen1-4/+13
2025-01-06[AMDGPU][True16][MC] true16 for v_fma_f16 (#119477)Brox Chen1-1/+4
2024-11-05[AMDGPU][True16][MC] VOP2 update instructions with fake16 format (#114436)Brox Chen1-2/+2
2024-10-17[APInt] Fix APInt constructions where value does not fit bitwidth (NFCI) (#80...Nikita Popov1-2/+2
2024-10-03[AMDGPU] Qualify auto. NFC. (#110878)Jay Foad1-14/+14
2024-09-03[AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (#106967)Christudasan Devadasan1-15/+37
2024-08-13[AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (#102620)Brox Chen1-0/+4
2024-08-12[AMDGPU][True16] fix a bug in codeGen causing e64 with wrong vgpr type to shr...Brox Chen1-1/+1
2024-08-08[AMDGPU][True16][CodeGen] support v_mov_b16 and v_swap_b16 in true16 format (...Brox Chen1-20/+45
2024-06-22AMDGPU: Materialize bitwise not of inline immediates (#95960)Matt Arsenault1-17/+41
2024-04-24[CodeGen] Make the parameter TRI required in some functions. (#85968)Xu Zhang1-1/+1
2024-02-12AMDGPU/NFC: Remove some bits from TSFlags (#81525)Konstantin Zhuravlyov1-3/+3
2023-12-14[AMDGPU] Remove s_cmpk_* for GFX12 (#75497)Jay Foad1-0/+3
2023-10-26[AMDGPU] Shrink to SOPK with 32-bit signed literals (#70263)Stanislav Mekhanoshin1-5/+10
2023-10-19[AMDGPU] Remove legality checks from imm folding in shrink. NFCI. (#69539)Stanislav Mekhanoshin1-2/+1
2023-07-21[AMDGPU] [NFC] Fixed a typo in SIShrinkInstructions.cppPranav Taneja1-1/+1
2023-02-23[AMDGPU][GFX11] Legalize and select partial NSA MIMG instructionsMirko Brkusanin1-3/+6
2023-02-07[CodeGen] Make more use of MachineOperand::getOperandNo. NFC.Jay Foad1-4/+2
2023-01-28[Target] Use llvm::count{l,r}_{zero,one} (NFC)Kazu Hirata1-2/+2
2023-01-23[MC] Define and use MCInstrDesc implicit_uses and implicit_defs. NFC.Jay Foad1-4/+6
2022-11-29[AMDGPU] Add support for new LLVM vector typesMateja Marjanovic1-0/+8
2022-11-18[AMDGPU] Stop looking for implicit M0 uses on MOV instructionsJay Foad1-8/+1
2022-09-20[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,CJoe Nash1-2/+30
2022-09-13[AMDGPU] Don't shrink VOP3 instructions pre-RA on GFX10+Jay Foad1-0/+18
2022-09-08[AMDGPU] Fix shrinking of F16 FMA on newer subtargetsJay Foad1-1/+4
2022-06-16[AMDGPU] GFX11 CodeGen support for MIMG instructionsJay Foad1-10/+28
2022-06-16[AMDGPU] Change use null for dead sdst to be gfx1030+David Stuttard1-2/+2
2022-06-13[AMDGPU] Use null for dead sdst operandStanislav Mekhanoshin1-2/+25
2022-05-18[AMDGPU] Aggressively fold immediates in SIShrinkInstructionsJay Foad1-8/+4
2022-05-18[AMDGPU] Shrink F16 MAD/FMA to MADAK/MADMK/FMAAK/FMAMK on GFX10Jay Foad1-2/+15
2022-05-16[AMDGPU] Shrink MAD/FMA to MADAK/MADMK/FMAAK/FMAMK on GFX10Jay Foad1-0/+87
2022-05-16[AMDGPU] SIShrinkInstructions: change static functions to methodsJay Foad1-102/+114
2022-03-25[AMDGPU] Improve v_cmpx usage on GFX10.3.Thomas Symalla1-14/+20
2022-03-21Revert "[AMDGPU] Improve v_cmpx usage on GFX10.3."Thomas Symalla1-20/+14
2022-03-21[AMDGPU] Improve v_cmpx usage on GFX10.3.Thomas Symalla1-14/+20