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path: root/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
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2025-11-15[AMDGPU] Delete some dead code (NFC) (#167891)Sergei Barannikov1-22/+14
2025-11-14[AMDGPU] Make use of getFunction and getMF. NFC. (#167872)Jay Foad1-1/+1
2025-11-13[CodeGen] Use VirtRegOrUnit where appropriate (NFCI) (#167730)Sergei Barannikov1-11/+11
2025-10-13[AMDGPU] Add register usage debug printing the point of maximum register pres...Valery Pykhtin1-1/+131
2025-10-10[AMDGPU] Use correct SlotIndex to calculate live-out register set. (#161720)Valery Pykhtin1-4/+4
2025-08-08[AMDGPU][Scheduler] Consistent occupancy calculation during rematerialization...Lucas Ramirez1-27/+29
2025-07-25[AMDGPU] NFCI: Track AV Register Pressure separately (#149863)Jeffrey Byrnes1-1/+5
2025-06-26[AMDGPU] Add `GCNRPTarget` to track register pressure against a target (#145...Lucas Ramirez1-0/+63
2025-06-24[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)Diana Picus1-9/+15
2025-06-20[AMDGPU] Fix a potential integer overflow in GCNRegPressure when true16 is en...Shilei Tian1-4/+24
2025-06-04[AMDGPU] Simplify `GCNRegPressure::RegKind` (NFC) (#142682)Lucas Ramirez1-34/+16
2025-03-21[AMDGPU] Avoid repeated hash lookups (NFC) (#132511)Kazu Hirata1-4/+4
2025-01-22[CodeGen] Rename RegisterMaskPair to VRegMaskOrUnit. NFC (#123799)Craig Topper1-10/+10
2024-10-09[AMDGPU] Optionally Use GCNRPTrackers during scheduling (#93090)Jeffrey Byrnes1-23/+176
2024-10-08[AMDGPU] Constrain use LiveMask by the operand's LaneMask for RP calculation.Jeffrey Byrnes1-21/+31
2024-10-03[AMDGPU] Qualify auto. NFC. (#110878)Jay Foad1-2/+3
2024-07-10[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)paperchalice1-1/+1
2024-02-26[AMDGPU] Prefer lower total register usage in regions with spillingJeffrey Byrnes1-4/+92
2023-12-08[AMDGPU] Fix GCNUpwardRPTracker: max register pressure on defs. (#74422)Valery Pykhtin1-22/+28
2023-11-20[AMDGPU] Add live-through register set printing to GCNRegPressurePrinter pass...Valery Pykhtin1-0/+41
2023-11-10[AMDGPU] Fix GCNUpwardRPTracker. (#71186)Valery Pykhtin1-65/+72
2023-11-01[AMDGPU] GCNRegPressurePrinter pass to print GCNRegPressure values for testin...Valery Pykhtin1-14/+130
2023-09-15[AMDGPU] Tweak tuple weight calculation. NFC. (#66490)Jay Foad1-1/+3
2023-06-05[AMDGPU] Make use of MachineInstr::all_defs and all_uses. NFCI.Jay Foad1-5/+3
2023-03-09[AMDGPU] Speedup GCNDownwardRPTracker::advanceBeforeNextValery Pykhtin1-10/+25
2022-12-02Revert "[AMDGPU] Speedup GCNDownwardRPTracker::advanceBeforeNext"Jay Foad1-25/+10
2022-12-02[AMDGPU] Speedup GCNDownwardRPTracker::advanceBeforeNextValery Pykhtin1-10/+25
2022-11-03[AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBBValery Pykhtin1-7/+11
2022-10-28Revert "[AMDGPU] Add EXPENSIVE_CHECK into GCNRPTracker::reset"Valery Pykhtin1-16/+0
2022-10-28[AMDGPU] Add EXPENSIVE_CHECK into GCNRPTracker::resetValery Pykhtin1-0/+16
2022-10-28[AMDGPU] Refactor debug printing routines for GCNRPTrackerValery Pykhtin1-88/+60
2022-01-19[NFC] Use Register instead of unsignedJim Lin1-2/+2
2021-11-26[AMDGPU] Make vector superclasses allocatableChristudasan Devadasan1-5/+5
2021-02-17[AMDGPU] gfx90a supportStanislav Mekhanoshin1-6/+11
2021-02-01AMDGPU: Fix dbg_value handling when forming soft clause bundlesMatt Arsenault1-0/+1
2021-01-20[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargetsdfukalov1-1/+0
2021-01-07[Target] Use llvm::find_if (NFC)Kazu Hirata1-3/+2
2021-01-07[NFC][AMDGPU] Reduce include files dependency.dfukalov1-17/+0
2020-08-20[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegisterJay Foad1-8/+7
2020-02-19[AMDGPU] Fix assumption about LaneBitmask contentStanislav Mekhanoshin1-6/+3
2020-02-06[AMDGPU] Cleanup assumptions about generated subregsStanislav Mekhanoshin1-2/+2
2020-01-31[AMDGPU] Add file headers for few files where it is missing.hsmahesha1-0/+5
2020-01-27[AMDGPU] Fix GCN regpressure trackers for INLINEASM instructions.vpykhtin1-4/+5
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders1-1/+1
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-12/+9
2019-07-30[AMDGPU] Print register pressure for agpr and vgpr separatelyStanislav Mekhanoshin1-1/+2
2019-07-11[AMDGPU] gfx908 mfma supportStanislav Mekhanoshin1-2/+6
2019-06-18[AMDGPU] Speed up live-in virtual register set computaion in GCNScheduleDAGMI...Valery Pykhtin1-3/+4
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-07-11AMDGPU: Refactor Subtarget classesTom Stellard1-2/+2
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