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path: root/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
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2025-12-15[AMDGPU] tensor_{load_to/store_from}_lds => ..._d2 simplification (#171540)Krzysztof Drewniak1-0/+21
2025-12-12[AMGGPUInstCombine] Use getSigned() for frexp exponentNikita Popov1-1/+2
2025-12-06[AMDGPU] Eliminate InstCombineTables.td. NFC. (#170857)Jay Foad1-1/+1
2025-08-04[AMDGPU] gfx1250 v_wmma_scale[16]_f32_16x16x128_f8f6f4 codegen (#152036)Stanislav Mekhanoshin1-1/+3
2025-07-21AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)Changpeng Fang1-0/+41
2025-07-14[AMDGPU] Add support for `v_tanh_bf16` on gfx1250 (#147425)Shilei Tian1-1/+2
2025-06-24[AMDGPU] Fold fmed3 when inputs include infinity (#144824)Darren Wihandi1-13/+34
2025-06-18[AMDGPU] Support D16 folding for image.sample with multiple extractelement an...Harrison Hao1-0/+60
2025-06-18AMDGPU: Move fpenvIEEEMode into TTI (#141945)Matt Arsenault1-25/+3
2025-06-09[AMDGPU] Detect trivially uniform arguments in InstCombine (#129897)Jay Foad1-0/+2
2025-06-03[ValueTracking] Make Depth last default arg (NFC) (#142384)Ramkumar Ramachandra1-2/+1
2025-05-29AMDGPU: Make llvm.amdgcn.make.buffer.rsrc propagate poison (#141913)Matt Arsenault1-0/+6
2025-05-13[AMDGPU] Hoist readlane/readfirstlane through unary/binary operands (#129037)Pierre van Houtryve1-25/+98
2025-05-12AMDGPU: Use minimumnum/maximumnum for fmed3 with amdgpu-ieee=0Matt Arsenault1-9/+97
2025-05-12AMDGPU: Use minnum instead of maxnum for fmed3 src2-nan fold (#139531)Matt Arsenault1-1/+1
2025-05-12AMDGPU: Disable most fmed3 folds for strictfp (#139530)Matt Arsenault1-0/+3
2025-05-09AMDGPU: Use less surprising form of ConstantFP::get (#139248)Matt Arsenault1-2/+2
2025-05-02[IRBuilder] Add versions of createInsertVector/createExtractVector that take ...Craig Topper1-2/+2
2025-04-24[AMDGPU] Use variadic isa<>. NFC. (#137016)Jay Foad1-1/+1
2025-04-10[AMDGPU] InstCombine llvm.amdgcn.ds.bpermute with uniform arguments (#130133)Jay Foad1-4/+23
2025-04-02[Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (#133741)Juan Manuel Martinez Caamaño1-0/+23
2025-03-18AMDGPU: Replace unused permlane inputs with poison instead of undef (#131288)Matt Arsenault1-2/+2
2025-03-18AMDGPU: Replace unused update.dpp inputs with poison instead of undef (#131287)Matt Arsenault1-2/+2
2025-03-18AMDGPU: Replace unused export inputs with poison instead of undef (#131286)Matt Arsenault1-2/+2
2025-03-14AMDGPU: Make fma_legacy intrinsic propagate poison (#131063)Matt Arsenault1-0/+5
2025-03-14AMDGPU: Make fmul_legacy intrinsic propagate poison (#131062)Matt Arsenault1-0/+5
2025-03-14AMDGPU: Make ballot intrinsic propagate poison (#131061)Matt Arsenault1-1/+5
2025-03-14AMDGPU: Make fmed3 intrinsic propagate poison (#131060)Matt Arsenault1-0/+5
2025-03-14AMDGPU: Make cvt_pknorm and cvt_pk intrinsics propagate poison (#131059)Matt Arsenault1-0/+4
2025-03-13AMDGPU: Make frexp_exp and frexp_mant intrinsics propagate poison (#130915)Matt Arsenault1-0/+3
2025-03-13AMDGPU: Make sqrt and rsq intrinsics propagate poison (#130914)Matt Arsenault1-0/+2
2025-03-13AMDGPU: Make rcp intrinsic propagate poison (#130913)Matt Arsenault1-0/+2
2025-03-07AMDGPU: Handle demanded subvectors for readfirstlane (#128648)Matt Arsenault1-10/+34
2025-03-06Revert "[AMDGPU] InstCombine llvm.amdgcn.ds.bpermute with uniform arguments (...Jay Foad1-21/+3
2025-03-06[AMDGPU] InstCombine llvm.amdgcn.ds.bpermute with uniform arguments (#129895)Jay Foad1-3/+21
2025-03-05AMDGPU: Fix worklist management in simplifyDemandedVectorEltsIntrinsicMatt Arsenault1-5/+4
2025-03-05AMDGPU: Reduce readfirstlane for single demanded vector element (#128647)Matt Arsenault1-2/+44
2025-02-28AMDGPU: Simplify demanded vector elts of readfirstlane sources (#128646)Matt Arsenault1-0/+4
2025-02-27AMDGPU: Fold bitcasts into readfirstlane, readlane, and permlane64 (#128494)Matt Arsenault1-0/+25
2025-02-25AMDGPU: Make is.shared and is.private propagate poison (#128617)Matt Arsenault1-1/+4
2025-01-15[AMDGPU] Use correct vector elt type when shrinking mfma scale (#123043)Fraser Cormack1-1/+1
2024-12-13PatternMatch: migrate to CmpPredicate (#118534)Ramkumar Ramachandra1-1/+1
2024-12-06AMDGPU: Simplify demanded bits on readlane/writeline index arguments (#117963)Matt Arsenault1-1/+42
2024-11-25[llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (#114481)Alex Voicu1-0/+6
2024-11-21AMDGPU: Shrink used number of registers for mfma scale based on format (#117047)Matt Arsenault1-0/+56
2024-11-21AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)Matt Arsenault1-0/+1
2024-11-18AMDGPU: Add v_prng_b32 instruction for gfx950 (#116310)Matt Arsenault1-0/+6
2024-10-17[LLVM] Make more use of IRBuilder::CreateIntrinsic. NFC. (#112706)Jay Foad1-13/+7
2024-10-11[NFC] Rename `Intrinsic::getDeclaration` to `getOrInsertDeclaration` (#111752)Rahul Joshi1-8/+9
2024-10-03[AMDGPU] Qualify auto. NFC. (#110878)Jay Foad1-1/+1
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