aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
AgeCommit message (Expand)AuthorFilesLines
2025-12-08[AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (#170886)Dark Steve1-2/+2
2025-12-02AMDGPU: Fix treating unknown mem operands as uniform (#170309)Matt Arsenault1-10/+8
2025-11-25AMDGPU: Use RegClassByHwMode to manage GWS operand special case (#169373)Matt Arsenault1-2/+31
2025-11-20AMDGPU: Handle invariant loads when considering if a load can be scalar (#168...Matt Arsenault1-1/+2
2025-11-20AMDGPU: Fix treating divergent loads as uniform (#168785)Matt Arsenault1-3/+11
2025-11-19[AMDGPU][SDAG] Only fold flat offsets if they are inbounds PTRADDs (#165427)Fabian Ritter1-65/+76
2025-11-14AMDGPU: Select vector reg class for divergent build_vector (#168169)Matt Arsenault1-3/+7
2025-11-14AMDGPU: Consider isVGPRImm when forming constant from build_vector (#168168)Matt Arsenault1-0/+18
2025-10-08[AMDGPU] Remove setcc by using add/sub carryout (#155255)LU-JOHN1-2/+1
2025-10-08AMDGPU: Use RegClassByHwMode to manage operand VGPR operand constraints (#158...Matt Arsenault1-5/+8
2025-09-30AMDGPU: Use srcvalue and delete Ignore complex pattern (#161359)Petar Avramovic1-2/+0
2025-09-30AMDGPU: Fix s_barrier_leave to write to scc (#161221)Petar Avramovic1-0/+2
2025-09-25[AMDGPU] Calc IsVALU correctly during UADDO/USUBO selection (#159814)LU-JOHN1-4/+11
2025-09-24[AMDGPU][True16][CodeGen] true16 isel pattern for fma_mix_f16/bf16 (#159648)Brox Chen1-10/+18
2025-09-19[AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (#145330)Fabian Ritter1-3/+3
2025-09-11[AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit w...Chris Jackson1-9/+32
2025-09-03[AMDGPU] Support cluster_load_async_to_lds instructions on gfx1250 (#156595)Changpeng Fang1-0/+18
2025-09-02[AMDGPU] Support cluster load instructions for gfx1250 (#156548)Changpeng Fang1-0/+17
2025-08-22[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)Ivan Kosarev1-0/+1
2025-08-15[AMDGPU] Select mul_lohi to V_MAD_NC_{I|U}64_I32 on gfx1250 (#153851)Stanislav Mekhanoshin1-7/+14
2025-08-14[AMDGPU][True16][CodeGen] insert proper register for 16bit data type in vop3p...Brox Chen1-1/+37
2025-08-07[AMDGPU] Recognise bitmask operations as srcmods on select (#152119)Chris Jackson1-0/+38
2025-08-04[AMDGPU] Use SDNodeXForm to select a few VOP3P modifiers, NFC (#151907)Changpeng Fang1-57/+0
2025-07-29[AMDGPU] Implement v_mad_u32/v_mad_nc_u|i64_u32 on gfx1250 (#151226)Stanislav Mekhanoshin1-0/+11
2025-07-29[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)Changpeng Fang1-0/+18
2025-07-24[AMDGPU] Support builtin/intrinsics for load monitors on gfx1250 (#150540)Changpeng Fang1-0/+16
2025-07-24[AMDGPU] Support V_FMA_MIX*_BF16 instructions on gfx1250 (#150381)Changpeng Fang1-31/+104
2025-07-22[AMDGPU] Select scale_offset for scratch instructions on gfx1250 (#150111)Stanislav Mekhanoshin1-1/+7
2025-07-22[AMDGPU] Select scale_offset for global instructions on gfx1250 (#150107)Stanislav Mekhanoshin1-30/+55
2025-07-22[AMDGPU] Select scale_offset with SMEM instructions (#150078)Stanislav Mekhanoshin1-33/+110
2025-07-22Revert "[AMDGPU] Recognise bitmask operations as srcmods" (#150000)Chris Jackson1-32/+0
2025-07-22[AMDGPU] Recognise bitmask operations as srcmods on integer types (#149110)Chris Jackson1-0/+32
2025-07-18[AMDGPU] Select flat GVS atomics on gfx1250 (#149554)Stanislav Mekhanoshin1-0/+23
2025-07-15AMDGPU: Support intrinsic selection for gfx1250 wmma instructions (#148957)Changpeng Fang1-0/+77
2025-07-14[AMDGPU] Use 64-bit literals in codegen on gfx1250 (#148727)Stanislav Mekhanoshin1-2/+31
2025-07-12[AMDGPU] Remove unnecessary casts (NFC) (#148340)Kazu Hirata1-6/+3
2025-07-08[AMDGPU] Fix broken uses of isLegalFLATOffset and splitFlatOffset (#147469)Fabian Ritter1-3/+4
2025-06-20AMDGPU: Remove AMDGPUInstrInfo class (#144984)Matt Arsenault1-1/+1
2025-05-05[AMDGPU][True16][CodeGen] optimize codegen for mad-mix in true16 (#124995)Brox Chen1-0/+5
2025-05-04[llvm] Remove unused local variables (NFC) (#138478)Kazu Hirata1-4/+0
2025-03-17[AMDGPU] Add intrinsics and MIs for ds_bvh_stack_* (#130007)Mariusz Sikora1-3/+18
2025-03-14[NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (#131379)Shilei Tian1-2/+1
2025-03-14[NFC][AMDGPU] Replace direct arch comparison with `isAMDGCN()` (#131357)Shilei Tian1-1/+1
2025-01-23AMDGPU: Make vector_shuffle legal for v2i32 with v_pk_mov_b32 (#123684)Matt Arsenault1-0/+119
2025-01-20[AMDGPU] Fix DAG types for V_MAD_I64_I32 and V_MAD_U64_U32. NFC. (#123629)Jay Foad1-1/+2
2025-01-15[SelectionDAG][AMDGPU] Negative offset when selecting scratch sv offsets (#12...jofrn1-1/+2
2025-01-07AMDGPU: Use getSignedTargetConstant for ImmOffset in SelectScratchSVAddr (#12...Changpeng Fang1-1/+1
2024-12-19[AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions. (#120588)Konstantina Mitropoulou1-0/+3
2024-12-19[SelectionDAG] Move SDNode::use_iterator::getOperandNo to SDUse. (#120536)Craig Topper1-2/+2
2024-12-19[SelectionDAG] Split SDNode::use_iterator into user_iterator and use_iterator...Craig Topper1-4/+6