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2025-05-29Revert "Revert "[Object] Handle SHT_CREL relocation sections when resolving ↵Kewen121-1/+2
relocation data"" (#142075) Reverts llvm/llvm-project#142068 This PR breaks several buildbots. e.g https://lab.llvm.org/buildbot/#/builders/10/builds/6340
2025-05-29Revert "[Object] Handle SHT_CREL relocation sections when resolving ↵David Blaikie1-2/+1
relocation data" (#142068) Reverts llvm/llvm-project#141843 The test case relies on clang, which LLVM test cases can't use.
2025-05-29[DirectX] Adding support for static samplers in yaml2obj/obj2yaml (#139963)joaosaffran1-0/+5
- Adds support for static samplers ins dxcontainer binary format. - Adds writing logic to mcdxbc - adds reading logic to Object - adds tests Closes: [126636](https://github.com/llvm/llvm-project/issues/126636) --------- Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
2025-05-29[Object] Handle SHT_CREL relocation sections when resolving relocation data ↵Zequan Wu1-1/+2
(#141843) Fixes #141680
2025-05-28[llvm][llvm-objdump] Fix fatbin handling on 32-bit systems (#141620)David Spickett1-7/+5
Which fixes a test failure seen on the bots, introduced by https://github.com/llvm/llvm-project/pull/140286. ``` [ RUN ] OffloadingBundleTest.checkExtractOffloadBundleFatBinary ObjectTests: ../llvm/llvm/include/llvm/ADT/StringRef.h:618: StringRef llvm::StringRef::drop_front(size_t) const: Assertion `size() >= N && "Dropping more elements than exist"' failed. 0 0x0a24a990 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/tcwg-buildbot/worker/clang-armv8-quick/stage1/unittests/Object/./ObjectTests+0x31a990) 1 0x0a248364 llvm::sys::RunSignalHandlers() (/home/tcwg-buildbot/worker/clang-armv8-quick/stage1/unittests/Object/./ObjectTests+0x318364) 2 0x0a24b410 SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0 3 0xf46ed6f0 __default_rt_sa_restorer ./signal/../sysdeps/unix/sysv/linux/arm/sigrestorer.S:80:0 4 0xf46ddb06 ./csu/../sysdeps/unix/sysv/linux/arm/libc-do-syscall.S:47:0 5 0xf471d292 __pthread_kill_implementation ./nptl/pthread_kill.c:44:76 6 0xf46ec840 gsignal ./signal/../sysdeps/posix/raise.c:27:6 ``` Also reported on 32-bit x86. I think the cause is the code was casting the result of StringRef.find into an int64_t. The failure value of find is StringRef::npos, which is defined as: static constexpr size_t npos = ~size_t(0); * size_t(0) is 32 bits of 0s * the inverse of that is 32 bits of 1s * Cast to int64_t needs to widen this, and it will preserve the original value in doing so, which is 0xffffffff. * The result is 0x00000000ffffffff, which is >= 0, so we keep searching and try to go off the end of the file. Or put another way, this equivalent function returns true when compiled for a 32-bit system: ``` bool fn() { size_t foo = ~size_t(0); int64_t foo64 = (int64_t)foo; return foo64 >= 0; } ``` Using size_t throughout fixes the problem. Also I don't see a reason it needs to be a signed number, given that it always searches forward from the current offset.
2025-05-27[NFC] Updating RTS0 namespace to contain all elements related to it's ↵joaosaffran1-1/+2
representation (#141173) As requested in a previous PR, this change moves all structs related to RTS0 to RTS0 namespace. --------- Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
2025-05-26[llvm] Value-initialize values with *Map::try_emplace (NFC) (#141522)Kazu Hirata1-2/+1
try_emplace value-initializes values, so we do not need to pass nullptr to try_emplace when the value types are raw pointers or std::unique_ptr<T>.
2025-05-26[MachO] Improve bounds check (#141083)Nikita Popov1-1/+2
The current check may fail if the addition overflows. I've observed failures of macho-invalid.test on 32-bit due to this. Instead, compare against the remaining bytes until the end of the object.
2025-05-23Extend llvm objdump fatbin (#140286)David Salinas2-0/+474
Utilize the new extensions to the LLVM Offloading API to extend to llvm-objdump to handle dumping fatbin offload bundles generated by HIP. This extension to llvm-objdump adds the option --offload-fatbin. Specifying this option will take the input object/executable and extract all offload fatbin bundle entries into distinct code object files with names reflecting the source file name combined with the Bundle Entry ID. Users can also use the --arch-name option to filter offload fatbin bundle entries by their target triple. --------- Co-authored-by: dsalinas <dsalinas@MKM-L1-DSALINAS.amd.com>
2025-05-18[MC][AArch64][ARM][X86] Push target-dependent assembler flags into targets ↵Jessica Clarke1-3/+4
(#139844) The .syntax unified directive and .codeX/.code X directives are, other than some simple common printing code, exclusively implemented in the targets themselves. Thus, remove the corresponding MCAF_* flags and reimplement the directives solely within the targets. This avoids exposing all targets to all other targets' flags. Since MCAF_SubsectionsViaSymbols is all that remains, convert it to its own function like other directives, simplifying its implementation. Note that, on X86, we now always need a target streamer when parsing assembly, as it's now used for directives that aren't COFF-specific. It still does not however need to do anything when producing a non-COFF object file, so this commit does not introduce any new target streamers. There is some churn in test output, and corresponding UTC regex changes, due to comments no longer being flushed by these various directives (and EmitEOL is not exposed outside MCAsmStreamer.cpp so we couldn't do so even if we wanted to), but that was a bit odd to be doing anyway. This is motivated by Morello LLVM, which adds yet another assembler flag to distinguish A64 and C64 instruction sets, but did not update every switch and so emits warnings during the build. Rather than fix those warnings it seems better to instead make the problem not exist in the first place via this change.
2025-05-18[llvm] Remove unused local variables (NFC) (#140422)Kazu Hirata1-1/+0
2025-05-16Revert "Reapply: [llvm-objdump] Add support for HIP offload bundles (#140128)"Kazu Hirata2-474/+0
This reverts commit 910220b84fa18ce2cbb2e21dd53b9f3d0ae582a7. Multiple buildbot failures have been reported: https://github.com/llvm/llvm-project/pull/140128
2025-05-16Reapply: [llvm-objdump] Add support for HIP offload bundles (#140128)David Salinas2-0/+474
Utilize the new extensions to the LLVM Offloading API to extend to llvm-objdump to handle dumping fatbin offload bundles generated by HIP. This extension to llvm-objdump adds the option --offload-fatbin. Specifying this option will take the input object/executable and extract all offload fatbin bundle entries into distinct code object files with names reflecting the source file name combined with the Bundle Entry ID. Users can also use the --arch-name option to filter offload fatbin bundle entries by their target triple. --------- Co-authored-by: dsalinas <dsalinas@MKM-L1-DSALINAS.amd.com>
2025-05-08Revert "[llvm-objdump] Add support for HIP offload bundles (#114834)"Kazu Hirata2-479/+0
This reverts commit 06d6623bc304d5fc2fe11b80b62b4c5d10f9eaa1. Buildbot failure: https://lab.llvm.org/buildbot/#/builders/145/builds/6871/steps/5/logs/stdio
2025-05-08[llvm-objdump] Add support for HIP offload bundles (#114834)David Salinas2-0/+479
Utilize the new extensions to the LLVM Offloading API to extend to llvm-objdump to handle dumping fatbin offload bundles generated by HIP. This extension to llvm-objdump adds the option --offload-fatbin. Specifying this option will take the input object/executable and extract all offload fatbin bundle entries into distinct code object files with names reflecting the source file name combined with the Bundle Entry ID. Users can also use the --arch-name option to filter offload fatbin bundle entries by their target triple. --------- Co-authored-by: dsalinas <dsalinas@MKM-L1-DSALINAS.amd.com>
2025-04-17[SYCL] Add clang-linker-wrapper changes to call clang-sycl-linker for SYCL ↵Arvind Sudarsanam1-0/+3
offloads (#135683) This PR is one of the many PRs in the SYCL upstreaming effort focusing on device code linking during the SYCL offload compilation process. RFC: https://discourse.llvm.org/t/rfc-offloading-design-for-sycl-offload-kind-and-spir-targets/74088 Approved PRs so far: 1. [Clang][SYCL] Introduce clang-sycl-linker to link SYCL offloading device code (Part 1 of many) - [Link](https://github.com/llvm/llvm-project/pull/112245) 2. [clang-sycl-linker] Replace llvm-link with API calls - [Link](https://github.com/llvm/llvm-project/pull/133797) 3. [SYCL][SPIR-V Backend][clang-sycl-linker] Add SPIR-V backend support inside clang-sycl-linker - [Link](https://github.com/llvm/llvm-project/pull/133967) This PR adds SYCL device code linking support to clang-linker-wrapper. ### Summary for this PR Device code linking happens inside clang-linker-wrapper. In the current implementation, clang-linker-wrapper does the following: 1. Extracts device code. Input_1, Input_2,..... 5. Group device code according to target devices Inputs[triple_1] = .... Inputs[triple_2] = .... 6. For each group, i.e. Inputs[triple_i], a. Gather all the offload kinds found inside those inputs in ActiveOffloadKinds b. Link all images inside Inputs[triple_i] by calling clang --target=triple_i .... c. Create a copy of that linked image for each offload kind and add it to Output[Kind] list. In SYCL compilation flow, there is a deviation in Step 3b. We call device code splitting inside the 'clang --target=triple_i ....' call and the output is now a 'packaged' file containing multiple device images. This deviation requires us to capture the OffloadKind during the linking stage and pass it along to the linking function (clang), so that clang can be called with a unique option '--sycl-link' that will help us to call 'clang-sycl-linker' under the hood (clang-sycl-linker will do SYCL specific linking). Our current objective is to implement an end-to-end SYCL offloading flow and get it working. We will eventually merge our approach with the community flow. Thanks --------- Signed-off-by: Arvind Sudarsanam <arvind.sudarsanam@intel.com>
2025-04-16[DirectX] adding support in obj2yaml and yaml2obj to root constants (#127840)joaosaffran1-22/+9
Adding support for Root Constant in MC, Object and obj2yaml and yaml2obj, this PR adds: - new structures to dxbc definition. - serialize and desirialize logic from dxcontainer to yaml - tests validating against dxc - adding support to multiple parts. Closes: https://github.com/llvm/llvm-project/issues/126633 --------- Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
2025-04-12[Object][COFF] Avoid underscore prefix for forwarding exports (#135433)Jacek Caban1-1/+4
Fixes #132411.
2025-04-08[llvm-nm] Fix how inlined dylibs are reported from tbd files (#134498)Cyndy Ishida1-7/+16
An Inlined library is a dylib that is reexported from an umbrella or top-level library. When this is encoded in tbd files, ensure we are reading the symbol table from the inlined library when `--add-inlinedinfo` is used as opposed to the top-level lib. resolves: rdar://147767733
2025-04-03[JITLink][XCOFF] Setup initial build support for XCOFF (#127266)Henry Jiang1-3/+7
This patch starts the initial implementation of JITLink for XCOFF (Object format for AIX).
2025-03-28[llvm] Use range constructors of *Set (NFC) (#133549)Kazu Hirata1-1/+1
2025-03-26[llvm-objdump][ARM] Find ELF file PLT entries for arm, thumb (#130764)Vladislav Dzhidzhoev1-0/+6
This implements arm, armeb, thumb, thumbeb PLT entries parsing support in ELF for llvm-objdump. Implementation is similar to AArch64MCInstrAnalysis::findPltEntries. PLT entry signatures are based on LLD code for PLT generation (ARM::writePlt). llvm-objdump tests are produced from lld/test/ELF/arm-plt-reloc.s, lld/test/ELF/armv8-thumb-plt-reloc.s.
2025-03-18[llvm-objdump] Pass MCSubtargetInfo to findPltEntries (NFC) (#131773)Vladislav Dzhidzhoev1-2/+3
It allows access to subtarget features, collected in llvm-objdump.cpp, from findPltEntries, which will be used in https://github.com/llvm/llvm-project/pull/130764.
2025-03-06[IR] Store Triple in Module (NFC) (#129868)Nikita Popov4-7/+6
The module currently stores the target triple as a string. This means that any code that wants to actually use the triple first has to instantiate a Triple, which is somewhat expensive. The change in #121652 caused a moderate compile-time regression due to this. While it would be easy enough to work around, I think that architecturally, it makes more sense to store the parsed Triple in the module, so that it can always be directly queried. For this change, I've opted not to add any magic conversions between std::string and Triple for backwards-compatibilty purses, and instead write out needed Triple()s or str()s explicitly. This is because I think a decent number of them should be changed to work on Triple as well, to avoid unnecessary conversions back and forth. The only interesting part in this patch is that the default triple is Triple("") instead of Triple() to preserve existing behavior. The former defaults to using the ELF object format instead of unknown object format. We should fix that as well.
2025-03-04[lld][WebAssembly] Support for the custom-page-sizes WebAssembly proposal ↵Nick Fitzgerald1-0/+6
(#128942) This commit adds support for WebAssembly's custom-page-sizes proposal to `wasm-ld`. An overview of the proposal can be found [here](https://github.com/WebAssembly/custom-page-sizes/blob/main/proposals/custom-page-sizes/Overview.md). In a sentence, it allows customizing a Wasm memory's page size, enabling Wasm to target environments with less than 64KiB of memory (the default Wasm page size) available for Wasm memories. This commit contains the following: * Adds a `--page-size=N` CLI flag to `wasm-ld` for configuring the linked Wasm binary's linear memory's page size. * When the page size is configured to a non-default value, then the final Wasm binary will use the encodings defined in the custom-page-sizes proposal to declare the linear memory's page size. * Defines a `__wasm_first_page_end` symbol, whose address points to the first page in the Wasm linear memory, a.k.a. is the Wasm memory's page size. This allows writing code that is compatible with any page size, and doesn't require re-compiling its object code. At the same time, because it just lowers to a constant rather than a memory access or something, it enables link-time optimization. * Adds tests for these new features. r? @sbc100 cc @sunfishcode
2025-02-24[object][WebAssembly] Add support for RUNTIME_PATH to yaml2obj and obj2yaml ↵Hood Chatham1-0/+7
(#126080) This is the first step of adding RPATH support for wasm. See corresponding update to the WebAssembly/tool-conventions repo on dynamic linking: https://github.com/WebAssembly/tool-conventions/pull/246
2025-02-19[Object] Avoid repeated hash lookups (NFC) (#127746)Kazu Hirata1-2/+3
2025-02-19[AMDGPU] Replace gfx940 and gfx941 with gfx942 in llvm (#126763)Fabian Ritter1-4/+0
gfx940 and gfx941 are no longer supported. This is one of a series of PRs to remove them from the code base. This PR removes all non-documentation occurrences of gfx940/gfx941 from the llvm directory, and the remaining occurrences in clang. Documentation changes will follow. For SWDEV-512631
2025-02-13[DXIL] Add support for root signature flag element in DXContainer (#123147)joaosaffran1-10/+12
Adding support for Root Signature Flags Element extraction and writing to DXContainer. - Adding an analysis to deal with RootSignature metadata definition - Adding validation for Flag - writing RootSignature blob into DXIL Closes: [126632](https://github.com/llvm/llvm-project/issues/126632) --------- Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
2025-02-12[Object] Avoid repeated map lookups (NFC) (#126853)Kazu Hirata1-2/+1
2025-02-10[ELF] Add support for CREL locations for SHT_LLVM_BB_ADDR_MAPAiden Grossman1-14/+19
This patch adds support for properly decoding SHT_LLVM_BB_ADDR_MAP sections in relocatable object files when the relocation format is CREL. Reviewers: rlavaee, jh7370, red1bluelost, MaskRay Reviewed By: MaskRay Pull Request: https://github.com/llvm/llvm-project/pull/126446
2025-02-10[ELF] Add support for CREL to getSectionAndRelocationsAiden Grossman1-1/+9
This patch updates the getSectionAndRelocations function to also support CREL relocation sections. Unit tests have been added. This patch also updates consumers to say they explicitly do not support CREL format relocations. Subsequent patches will make the consumers work with CREL format relocations and also add in testing support. Reviewers: red1bluelost, MaskRay, rlavaee Reviewed By: MaskRay Pull Request: https://github.com/llvm/llvm-project/pull/126445
2025-02-07[DXIL] Adding support to RootSignatureFlags in obj2yaml (#122396)joaosaffran1-0/+61
This PR adds: - `RootSignatureFlags` extraction from DXContainer using `obj2yaml` This PR is part of: #121493 --------- Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
2025-02-04Revert "[Object][WebAssembly] Fix data segment offsets higher than 2^31 ↵Sam Clegg1-2/+2
(#125739)" (#125786) This reverts commit c798a5c4d5c3c8cb21e6001f505d8f44217c2244. This broke bunch of test the emscripten side. Reverting while we investigate.
2025-02-04[Object][WebAssembly] Fix data segment offsets higher than 2^31 (#125739)Sam Clegg1-2/+2
Fixes: #58555
2025-01-29[Hexagon] Add support for decoding PLT symbols (#123425)quic-areg1-0/+4
Describes PLT entries for hexagon.
2025-01-18[Object] Avoid repeated hash lookups (NFC) (#123448)Kazu Hirata1-4/+4
2025-01-17[WebAssembly][Object] Support more elem segment flags (#123427)Derek Schuff1-14/+27
Some tools (e.g. Rust tooling) produce element segment descriptors with neither elemkind or element type descriptors, but with init exprs instead of func indices (this is with the flags value of 4 in https://webassembly.github.io/spec/core/binary/modules.html#element-section). LLVM doesn't fully model reference types or the various ways to initialize element segments, but we do want to correctly parse and skip over all type sections, so this change updates the object parser to handle that case, and refactors for more clarity. The test file is updated to include one additional elem segment with a flags value of 4, an initializer value of (32.const 0) and an empty vector. Also support parsing files that export imported (undefined) functions.
2025-01-05[llvm-lib] Handle MIPS architecture (#121254)Hervé Poussineau1-0/+2
- add a test to check values for /machine argument - add a test to check if machine is correctly inferred from inputs
2024-12-27Revert "[llvm-lib] Handle MIPS architecture (#121007)"YunQiang Su1-2/+0
This reverts commit 5d529c32cc2d5342a0d183881b6c3023435ed5d3.
2024-12-27[llvm-lib] Handle MIPS architecture (#121007)Hervé Poussineau1-0/+2
- add a test to check values for /machine argument - add a test to check if machine is correctly inferred from inputs
2024-12-26[llvm-dlltool] Handle MIPS R4000 architecture (#114621)Hervé Poussineau1-0/+2
2024-12-20[Hexagon] Add V75 support to compiler and assembler (#120773)Ikhlas Ajbar1-0/+2
This patch introduces support for the Hexagon V75 architecture. It includes instruction formats, definitions, encodings, scheduling classes, and builtins/intrinsics.
2024-12-02Use MapVector to fix lld thinLTO "nondeterminism" issue. (#117551)llvmssh1-1/+2
When the ModuleSymbolTable is generated, the binary consistency problem occurs due to the data structure for collecting asm symbols was ordered by memory pointers.
2024-11-29[Support][Error] Add ErrorAsOutParameter constructor that takes an Error by ref.Lang Hames8-9/+9
ErrorAsOutParameter's Error* constructor supports cases where an Error might not be passed in (because in the calling context it's known that this call won't fail). Most clients always have an Error present however, and for them an Error& overload is more convenient.
2024-11-22[SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (#114447)Lei Wang1-21/+23
Sometimes we want to use a `PgoAnalysisMap` feature that doesn't require the BB entries info, e.g. only the `FuncEntryCount`, but the BB entries is emitted by default, so I'm adding an option to skip the info for this case to save the binary size(can save ~90% size of the section). For implementation, it extends a new field(`OmitBBEntries`) in `BBAddrMap::Features` for this and it's controlled by a switch `--basic-block-address-map-skip-bb-entries`. Note that this naturally supports backwards compatibility as the field is zero for the old version, matches the decoding in the new version llvm.
2024-11-19[Object] Remove unused includes (NFC) (#116750)Kazu Hirata10-16/+0
Identified with misc-include-cleaner.
2024-11-18AMDGPU: Add gfx950 subtarget definitions (#116307)Matt Arsenault1-0/+2
Mostly a stub, but adds some baseline tests and tests for removed instructions.
2024-11-15[llvm-lib][llvm-dlltool] Fix handling of invalid ARM64EC function names ↵Jacek Caban1-1/+8
(#116250) This is a follow-up to #115567. Emit an error for invalid function names, similar to MSVC's `lib.exe` behavior. Returning an error from `writeImportLibrary` exposed bugs in error handling by its callers, which have been addressed in this patch.
2024-11-12[AMDGPU] Introduce a new generic target `gfx9-4-generic` (#115190)Shilei Tian1-0/+2
This patch introduces a new generic target, `gfx9-4-generic`. Since it doesn’t support FP8 and XF32-related instructions, the patch includes several code reorganizations to accommodate these changes.