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path: root/llvm/lib/Object/ELFObjectFile.cpp
AgeCommit message (Expand)AuthorFilesLines
10 days[AMDGPU] Add gfx1251 subtarget (#159430)Stanislav Mekhanoshin1-0/+2
10 days[LLVM] Fix offload and update CUDA ABI for all SM values (#159354)Joseph Huber1-1/+7
2025-07-31[ELF] handle new NVIDIA GPU variants. (#151604)Artem Belevich1-0/+9
2025-07-21[LLVM] Update CUDA ELF flags for their new ABI (#149534)Joseph Huber1-2/+15
2025-07-16[llvm-objdump][RISCV] Display `@plt' symbols when disassembling .plt section ...Ming-Yi Lai1-0/+4
2025-07-02[SHT_LLVM_BB_ADDR_MAP] Remove support for versions 1 and 0 (SHT_LLVM_BB_ADDR_...Rahman Lavaee1-2/+1
2025-06-19[AMDGPU] Initial support for gfx1250 target. (#144965)Stanislav Mekhanoshin1-0/+2
2025-06-08[llvm] Compare std::optional<T> to values directly (NFC) (#143340)Kazu Hirata1-2/+1
2025-03-26[llvm-objdump][ARM] Find ELF file PLT entries for arm, thumb (#130764)Vladislav Dzhidzhoev1-0/+6
2025-03-18[llvm-objdump] Pass MCSubtargetInfo to findPltEntries (NFC) (#131773)Vladislav Dzhidzhoev1-2/+3
2025-03-06[IR] Store Triple in Module (NFC) (#129868)Nikita Popov1-1/+1
2025-02-19[AMDGPU] Replace gfx940 and gfx941 with gfx942 in llvm (#126763)Fabian Ritter1-4/+0
2025-01-29[Hexagon] Add support for decoding PLT symbols (#123425)quic-areg1-0/+4
2024-12-20[Hexagon] Add V75 support to compiler and assembler (#120773)Ikhlas Ajbar1-0/+2
2024-11-19[Object] Remove unused includes (NFC) (#116750)Kazu Hirata1-1/+0
2024-11-18AMDGPU: Add gfx950 subtarget definitions (#116307)Matt Arsenault1-0/+2
2024-11-12[AMDGPU] Introduce a new generic target `gfx9-4-generic` (#115190)Shilei Tian1-0/+2
2024-10-23[AMDGPU] Add a new target for gfx1153 (#113138)Carl Ritson1-0/+2
2024-08-06[BPF] Make llvm-objdump disasm default cpu v4 (#102166)yonghong-song1-0/+2
2024-07-08[llvm-objdump] -r: support CRELFangrui Song1-0/+11
2024-06-06[AMDGPU] Add a new target gfx1152 (#94534)Shilei Tian1-0/+2
2024-05-31AMDGPU: Add gfx12-generic target (#93875)Konstantin Zhuravlyov1-0/+2
2024-04-23[RISCV] Split code that tablegen needs out of RISCVISAInfo. (#89684)Craig Topper1-1/+1
2024-03-19[Hexagon] ELF attributes for Hexagon (#85359)quic-areg1-0/+78
2024-02-14[AMDGPU] Replace '.' with '-' in generic target names (#81718)Pierre van Houtryve1-2/+2
2024-02-12[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955)Pierre van Houtryve1-0/+10
2024-02-07[RISCV] Only set Zca flag for EF_RISCV_RVC in ELFObjectFileBase::getRISCVFeat...Craig Topper1-1/+1
2024-01-25[llvm] Silence warning when building with Clang ToTAlexandre Ganea1-1/+4
2024-01-19[SHT_LLVM_BB_ADDR_MAP] Add assertion and clarify docstring (#77374)Aiden Grossman1-0/+4
2024-01-09[RISCV] Deduplicate RISCVISAInfo::toFeatures/toFeatureVector. NFC (#76942)Luke Lau1-1/+1
2023-12-19[ELF] Add CPU name detection for CUDA architectures (#75964)Joseph Huber1-0/+69
2023-12-12[SHT_LLVM_BB_ADDR_MAP] Implements PGOAnalysisMap in Object and ObjectYAML wit...Micah Weston1-8/+15
2023-11-23[AMDGPU] Define new targets gfx1200 and gfx1201 (#73133)Jay Foad1-0/+6
2023-07-17[AMDGPU] Add targets gfx1150 and gfx1151Jay Foad1-0/+4
2023-07-12[llvm-objdump] Default to --mcpu=future for PPC32Fangrui Song1-0/+1
2023-06-26Move SubtargetFeature.h from MC to TargetParserJob Noorman1-1/+1
2023-05-16[llvm-objdump][X86] Add @plt symbols for .plt.gotFangrui Song1-32/+53
2023-05-10AMDGPU: Add basic gfx942 targetKonstantin Zhuravlyov1-0/+2
2023-05-10AMDGPU: Add basic gfx941 targetKonstantin Zhuravlyov1-0/+2
2023-05-03MCInstrAnalysis: make GotPltSectionVA x86-32 specificFangrui Song1-8/+14
2023-03-27[RISCV] Allow llvm-objdump to disassemble objects with unrecognised versions ...Alex Bradbury1-6/+1
2023-03-13[Propeller] Make decoding BBAddrMaps trace through relocationsAiden Grossman1-13/+28
2023-02-16[Object][NFC] Remove unneeded llvm_unreachableGregory Alfonso1-4/+2
2023-02-07[NFC][TargetParser] Remove llvm/ADT/Triple.hArchibald Elliott1-1/+1
2023-01-28Use llvm::count{lr}_{zero,one} (NFC)Kazu Hirata1-1/+1
2023-01-16Explicitly more Error when returning it (NFC)Mehdi Amini1-1/+1
2023-01-16[llvm-objdump][RISCV] Use new common method to parse ARCH RISCV attributeElena Lepilkina1-36/+19
2022-12-16std::optional::value => operator*/operator->Fangrui Song1-9/+9
2022-12-04[Object] llvm::Optional => std::optionalFangrui Song1-7/+7
2022-12-02[llvm] Use std::nullopt instead of None (NFC)Kazu Hirata1-2/+2
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