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2024-11-06[MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)yingopq1-1/+2
Fix parts of #102783.
2024-10-27[NVPTX] Remove nvvm.ldg.global.* intrinsics (#112834)Alex MacLean1-0/+14
Remove these intrinsics which can be better represented by load instructions with `!invariant.load` metadata: - llvm.nvvm.ldg.global.i - llvm.nvvm.ldg.global.f - llvm.nvvm.ldg.global.p
2024-10-17[SimplifyLibCall][Attribute] Fix bug where we may keep `range` attr with ↵goldsteinn1-2/+4
incompatible type (#112649) In a variety of places we change the bitwidth of a parameter but don't update the attributes. The issue in this case is from the `range` attribute when inlining `__memset_chk`. `optimizeMemSetChk` will replace an `i32` with an `i8`, and if the `i32` had a `range` attr assosiated it will cause an error. Fixes #112633
2024-10-17[LLVM] Make more use of IRBuilder::CreateIntrinsic. NFC. (#112706)Jay Foad1-43/+25
Convert many instances of: Fn = Intrinsic::getOrInsertDeclaration(...); CreateCall(Fn, ...) to the equivalent CreateIntrinsic call.
2024-10-16[LLVM] Make more use of IRBuilder::CreateIntrinsic. NFC. (#112546)Jay Foad1-95/+55
Convert almost every instance of: CreateCall(Intrinsic::getOrInsertDeclaration(...), ...) to the equivalent CreateIntrinsic call.
2024-10-15[clang][aarch64] Add support for the MSVC qualifiers __ptr32, __ptr64, ↵Daniel Paoliello1-9/+14
__sptr, __uptr for AArch64 (#111879) MSVC has a set of qualifiers to allow using 32-bit signed/unsigned pointers when building 64-bit targets. This is useful for WoW code (i.e., the part of Windows that handles running 32-bit application on a 64-bit OS). Currently this is supported on x64 using the 270, 271 and 272 address spaces, but does not work for AArch64 at all. This change adds the same 270, 271 and 272 address spaces to AArch64 and adjusts the data layout string accordingly. Clang will generate the correct address space casts, but these will currently be ignored until the AArch64 backend is updated to handle them. Partially fixes #62536 This is a resurrected version of <https://reviews.llvm.org/D158857> (originally created by @a_vorobev) - I've cleaned it up a little, fixed the rest of the tests and added to auto-upgrade for the data layout.
2024-10-11[NFC] Rename `Intrinsic::getDeclaration` to `getOrInsertDeclaration` (#111752)Rahul Joshi1-153/+165
Rename the function to reflect its correct behavior and to be consistent with `Module::getOrInsertFunction`. This is also in preparation of adding a new `Intrinsic::getDeclaration` that will have behavior similar to `Module::getFunction` (i.e, just lookup, no creation).
2024-10-09AMDGPU: Remove flat/global fmin/fmax intrinsics (#105642)Matt Arsenault1-9/+16
These have been replaced with atomicrmw
2024-10-08AMDGPU: Add noalias.addrspace metadata when autoupgrading atomic intrinsics ↵Matt Arsenault1-1/+12
(#102599) This will be needed to continue generating the raw instruction in the flat case.
2024-10-03[AArch64][SVE] Fix definition of bfloat fcvt intrinsics. (#110281)Paul Walker1-0/+38
Affected intrinsics: llvm.aarch64.sve.fcvt.bf16f32 llvm.aarch64.sve.fcvtnt.bf16f32 The named intrinsics took a predicate based on the smallest element type when it should be based on the largest. The intrinsics have been replace by v2 equivalents and affected code ported to use them. Patch includes changes to getSVEPredicateBitCast() that ensure the generated code for the auto-upgraded old intrinsics is unchanged.
2024-10-03[SPARC] Fix regression from UpgradeDataLayoutString change (#110608)Koakuma1-2/+2
It turns out that we cannot rely on the presence of `-i64:64` as a position reference when adding the `-i128:128` datalayout string due to some custom datalayout strings lacking it (e.g ones used by bugpoint, among other things). Do not add the `-i128:128` string in that case. This fixes the regression introduced in https://github.com/llvm/llvm-project/pull/106951.
2024-09-30[SPARC] Align i128 to 16 bytes in SPARC datalayouts (#106951)Koakuma1-0/+12
Align i128s to 16 bytes, following the example at https://reviews.llvm.org/D86310. clang already does this implicitly, but do it in backend code too for the benefit of other frontends (see e.g https://github.com/llvm/llvm-project/issues/102783 & https://github.com/rust-lang/rust/issues/128950).
2024-09-28Reland "[NVVM] Upgrade nvvm.ptr.* intrinics to addrspace cast" (#110262)Alex MacLean1-0/+19
Remove the following intrinsics which can be trivially replaced with an `addrspacecast` * llvm.nvvm.ptr.gen.to.global * llvm.nvvm.ptr.gen.to.shared * llvm.nvvm.ptr.gen.to.constant * llvm.nvvm.ptr.gen.to.local * llvm.nvvm.ptr.global.to.gen * llvm.nvvm.ptr.shared.to.gen * llvm.nvvm.ptr.constant.to.gen * llvm.nvvm.ptr.local.to.gen Also, cleanup the NVPTX lowering of `addrspacecast` making it more concise. This was reverted to avoid conflicts while reverting #107655. Re-landing unchanged.
2024-09-27Reland "[NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift ↵Alex MacLean1-78/+106
handling" (#110025) This change deprecates the following intrinsics which can be trivially converted to llvm funnel-shift intrinsics: - @llvm.nvvm.rotate.b32 - @llvm.nvvm.rotate.right.b64 - @llvm.nvvm.rotate.b64 This fixes a bug in the previous version (#107655) which flipped the order of the operands to the PTX funnel shift instruction. In LLVM IR the high bits are the first arg and the low bits are the second arg, while in PTX this is reversed.
2024-09-25Revert "[NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift ↵Dmitry Chernenkov1-106/+78
handling (#107655)" This reverts commit 9ac00b85e05d21be658d6aa0c91cbe05bb5dbde2.
2024-09-25Revert "[NVVM] Upgrade nvvm.ptr.* intrinics to addrspace cast (#109710)"Dmitry Chernenkov1-19/+0
This reverts commit 36757613b73908f055674a8df0b51cc00aa04373.
2024-09-24[NVVM] Upgrade nvvm.ptr.* intrinics to addrspace cast (#109710)Alex MacLean1-0/+19
Remove the following intrinsics which can be trivially replaced with an `addrspacecast` * llvm.nvvm.ptr.gen.to.global * llvm.nvvm.ptr.gen.to.shared * llvm.nvvm.ptr.gen.to.constant * llvm.nvvm.ptr.gen.to.local * llvm.nvvm.ptr.global.to.gen * llvm.nvvm.ptr.shared.to.gen * llvm.nvvm.ptr.constant.to.gen * llvm.nvvm.ptr.local.to.gen Also, cleanup the NVPTX lowering of `addrspacecast` making it more concise.
2024-09-23[NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handling ↵Alex MacLean1-78/+106
(#107655) This change deprecates the following intrinsics which can be trivially converted to llvm funnel-shift intrinsics: - @llvm.nvvm.rotate.b32 - @llvm.nvvm.rotate.right.b64 - @llvm.nvvm.rotate.b64
2024-09-23[NVPTX] Remove nvvm.bitcast.* intrinsics (#107936)Alex MacLean1-0/+8
Remove the following intrinsics which correspond directly to a bitcast: - llvm.nvvm.bitcast.f2i - llvm.nvvm.bitcast.i2f - llvm.nvvm.bitcast.d2ll - llvm.nvvm.bitcast.ll2d
2024-09-02[AutoUpgrade] Preserve attributes when upgrading named struct returnNikita Popov1-1/+2
For example, if the argument has an alignment attribute, preserve it.
2024-08-28Move stepvector intrinsic out of experimental namespace (#98043)Maciej Gabka1-0/+7
This patch is moving out stepvector intrinsic from the experimental namespace. This intrinsic exists in LLVM for several years now, and is widely used.
2024-08-22AMDGPU: Remove global/flat atomic fadd intrinics (#97051)Matt Arsenault1-2/+2
These have been replaced with atomicrmw.
2024-08-21AMDGPU: Remove flat/global atomic fadd v2bf16 intrinsics (#97050)Matt Arsenault1-4/+10
These are now fully covered by atomicrmw.
2024-08-12IR/AMDGPU: Autoupgrade amdgpu-unsafe-fp-atomics attribute (#101698)Matt Arsenault1-0/+34
Delete the attribute and annotate any atomicrmw instructions in the function with new metadata.
2024-08-06[IR] Don't verify module flags on every access (#102153)Alexis Engelke1-1/+19
8b4306ce050bd5 introduced validity checks for every module flag access, because the auto-upgrader uses named metadata before verifying the module. This causes overhead for all other accesses, and the check is, in fact, only need at that single place. Change the upgrader to be careful when accessing module flags before the module is verified and remove the checks on all other occasions. There are two tangential optimizations included: first, when querying a specific flag, don't enumerate all other flags into a vector as well. Second, don't use a Twine for getNamedMetadata(), which has materialization overhead -- all call sites use simple strings that can be implicitly converted to a StringRef.
2024-07-06Outline X86 autoupgrade patterns (#97851)Justin Holewinski1-1757/+1693
Outlining these patterns has a significant impact on the overall stack frame size of llvm::UpgradeIntrinsicCall. This is helpful for scenarios where compilation threads are stack-constrained. The overall impact is low when using clang as the host compiler, but very pronounced when using MSVC 2022 with release builds. Clang: 1,624 -> 824 bytes MSVC: 23,560 -> 6,120 bytes
2024-06-27AMDGPU: Add amdgpu.no.fine.grained.memory when upgrading old atomic ↵Matt Arsenault1-1/+7
intrinsics (#89655) This should replicate the old intrinsic behavior better when codegen of the raw instruction will require metadata in the future.
2024-06-27AMDGPU: Remove ds_fmin/ds_fmax intrinsics (#96739)Matt Arsenault1-2/+6
These have been replaced with atomicrmw.
2024-06-24Revert "[IR][NFC] Update IRBuilder to use InsertPosition (#96497)"Stephen Tozer1-2/+2
Reverts the above commit, as it updates a common header function and did not update all callsites: https://lab.llvm.org/buildbot/#/builders/29/builds/382 This reverts commit 6481dc57612671ebe77fe9c34214fba94e1b3b27.
2024-06-24[IR][NFC] Update IRBuilder to use InsertPosition (#96497)Stephen Tozer1-2/+2
Uses the new InsertPosition class (added in #94226) to simplify some of the IRBuilder interface, and removes the need to pass a BasicBlock alongside a BasicBlock::iterator, using the fact that we can now get the parent basic block from the iterator even if it points to the sentinel. This patch removes the BasicBlock argument from each constructor or call to setInsertPoint. This has no functional effect, but later on as we look to remove the `Instruction *InsertBefore` argument from instruction-creation (discussed [here](https://discourse.llvm.org/t/psa-instruction-constructors-changing-to-iterator-only-insertion/77845)), this will simplify the process by allowing us to deprecate the InsertPosition constructor directly and catch all the cases where we use instructions rather than iterators.
2024-06-23AMDGPU: Remove ds atomic fadd intrinsics (#95396)Matt Arsenault1-26/+66
These have been replaced with atomicrmw fadd
2024-06-21[IR] AutoUpgrade.cpp - don't directly dereference pointers from dyn_castSimon Pilgrim1-12/+8
Static analysis was reporting that dyn_cast<> can return null on failure - use cast<> instead
2024-06-06[LoongArch] Adjust LA64 data layout by using n32:64 in layout string (#93814)hev1-2/+2
Although i32 type is illegal in the backend, LA64 has pretty good support for i32 types by using W instructions. By adding n32 to the DataLayout string, middle end optimizations will consider i32 to be a native type. One known effect of this is enabling LoopStrengthReduce on loops with i32 induction variables. This can be beneficial because C/C++ code often has loops with i32 induction variables due to the use of `int` or `unsigned int`. If this patch exposes performance issues, those are better addressed by tuning LSR or other passes.
2024-05-05[clang backend] In AArch64's DataLayout, specify a minimum function ↵Doug Wyatt1-0/+8
alignment of 4. (#90702) This addresses an issue where the explicit alignment of 2 (for C++ ABI reasons) was being propagated to the back end and causing under-aligned functions (in special sections). This is an alternate approach suggested by @efriedma-quic in PR #90415. Fixes #90358
2024-04-30[IR] Use StringRef::operator== instead of StringRef::equals (NFC) (#90550)Kazu Hirata1-1/+1
I'm planning to remove StringRef::equals in favor of StringRef::operator==. - StringRef::operator== outnumbers StringRef::equals by a factor of 22 under llvm/ in terms of their usage. - The elimination of StringRef::equals brings StringRef closer to std::string_view, which has operator== but not equals. - S == "foo" is more readable than S.equals("foo"), especially for !Long.Expression.equals("str") vs Long.Expression != "str".
2024-04-29Move several vector intrinsics out of experimental namespace (#88748)Maciej Gabka1-6/+13
This patch is moving out following intrinsics: * vector.interleave2/deinterleave2 * vector.reverse * vector.splice from the experimental namespace. All these intrinsics exist in LLVM for more than a year now, and are widely used, so should not be considered as experimental.
2024-04-26[LLVM][SVE] Seperate the int and floating-point variants of addqv. (#89762)Paul Walker1-0/+12
We only use common intrinsics for operations that treat their element type as a container of bits.
2024-04-16[clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (#88455)Alex Voicu1-4/+5
Currently neither the SPIR nor the SPIRV targets specify the AS for globals in their datalayout strings. This is problematic because CodeGen/LLVM will default to AS0 in this case, which produces Globals that end up in the private address space for e.g. OCL, HIPSPV or SYCL. This patch addresses it by completing the datalayout string.
2024-04-11[clang][llvm] Remove "implicit-section-name" attribute (#87906)Arthur Eubanks1-0/+8
D33412/D33413 introduced this to support a clang pragma to set section names for a symbol depending on if it would be placed in bss/data/rodata/text, which may not be known until the backend. However, for text we know that only functions will go there, so just directly set the section in clang instead of going through a completely separate attribute. Autoupgrade the "implicit-section-name" attribute to directly setting the section on a Fuction.
2024-04-04[RemoveDIs][BC] Reject intrinsic->record upgrades for old-format modules ↵Stephen Tozer1-10/+29
(#87494) Fixes issue noted at: https://github.com/llvm/llvm-project/pull/86274 When loading bitcode lazily, we may request debug intrinsics be upgraded to debug records during the module parsing phase; later on we perform this upgrade when materializing the module functions. If we change the module's debug info format between parsing and materializing however, then the requested upgrade is no longer correct and leads to an assertion. This patch fixes the issue by adding an extra check in the autoupgrader to see if the upgrade is no longer suitable, and either exit-out or fall back to the correct intrinsic->intrinsic upgrade if one is required.
2024-03-20[RemoveDIs][NFC] Rename DPLabel->DbgLabelRecord (#85918)Stephen Tozer1-1/+1
This patch renames DPLabel to DbgLabelRecord, in accordance with the ongoing DbgRecord rename. This rename was fairly trivial, since DPLabel isn't as widely used as DPValue and has no real conflicts in either its full or abbreviated name. As usual, the entire replacement was done automatically, with `s/DPLabel/DbgLabelRecord/` and `s/DPL/DLR/`.
2024-03-19[RemoveDIs][NFC] Rename DPValue -> DbgVariableRecord (#85216)Stephen Tozer1-12/+12
This is the major rename patch that prior patches have built towards. The DPValue class is being renamed to DbgVariableRecord, which reflects the updated terminology for the "final" implementation of the RemoveDI feature. This is a pure string substitution + clang-format patch. The only manual component of this patch was determining where to perform these string substitutions: `DPValue` and `DPV` are almost exclusively used for DbgRecords, *except* for: - llvm/lib/target, where 'DP' is used to mean double-precision, and so appears as part of .td files and in variable names. NB: There is a single existing use of `DPValue` here that refers to debug info, which I've manually updated. - llvm/tools/gold, where 'LDPV' is used as a prefix for symbol visibility enums. Outside of these places, I've applied several basic string substitutions, with the intent that they only affect DbgRecord-related identifiers; I've checked them as I went through to verify this, with reasonable confidence that there are no unintended changes that slipped through the cracks. The substitutions applied are all case-sensitive, and are applied in the order shown: ``` DPValue -> DbgVariableRecord DPVal -> DbgVarRec DPV -> DVR ``` Following the previous rename patches, it should be the case that there are no instances of any of these strings that are meant to refer to the general case of DbgRecords, or anything other than the DPValue class. The idea behind this patch is therefore that pure string substitution is correct in all cases as long as these assumptions hold.
2024-03-19[RemoveDIs] Auto-upgrade debug intrinsics to DbgRecords (default false) (#85650)Orlando Cazalet-Hyams1-1/+69
If --load-bitcode-into-experimental-debuginfo-iterators is true then debug intrinsics are auto-upgraded to DbgRecords (the new debug info format). The upgrade is trivial because the two representations are semantically identical. llvm.dbg.value with 4 operands and llvm.dbg.addr intrinsics are upgraded in the same way as usual, but converted directly into DbgRecords instead of debug intrinsics.
2024-03-18[IR][NFC] Suppress warnings in ternary operatorsFraser Cormack1-11/+15
Just doing this the same way as in AMDGPUPromoteAlloca.cpp
2024-03-14Revert "[llvm][AArch64] Autoupgrade function attributes from Module ↵Daniel Kiss1-66/+0
attributes." (#85291) Reverts llvm/llvm-project#82763 because caused a regressions with inlining. See https://github.com/llvm/llvm-project/pull/84494#issuecomment-1996047458
2024-03-06[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)Emma Pilkington1-0/+9
The previous name 'amdgpu_code_object_version', was misleading since this is really a property of the HSA OS. The new spelling also matches the asm directive I added in bc82cfb.
2024-03-04[llvm][AArch64] Autoupgrade function attributes from Module attributes. (#82763)Dani1-0/+66
sign-return-address and similar module attributes should be propagated to the function level before got merged because module flags may contradict and this information is not recoverable. Generated code will match with the normal linking flow. Refactored version of (#80640). Run the attribute copy only during IRMove.
2024-02-23Revert "[llvm][AArch64] Autoupgrade function attributes from Module ↵Daniel Kiss1-71/+1
attributes. (#80640)" This reverts commit 531e8c26b3f2626e7f1a997e0e8b61d67d10aded.
2024-02-23[llvm][AArch64] Autoupgrade function attributes from Module attributes. (#80640)Dani1-1/+71
`sign-return-address` and similar module attributes should be propagated to the function level before modules got merged because module flags may contradict and this information is not recoverable. Generated code will match with the normal linking flow.
2024-02-05Revert "[IR] Use range-based for loops (NFC)"Shubham Sandeep Rastogi1-2/+2
This reverts commit e8512786fedbfa6ddba70ceddc29d7122173ba5e. This revert is done because llvm::drop_begin over an empty ArrayRef doesn't return an empty range, and therefore can lead to an invalid address returned instead. See discussion in https://github.com/llvm/llvm-project/pull/80737 for more context.