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2023-03-22[llvm] Skip getAPIntValue (NFC)Kazu Hirata2-6/+5
ConstantSDNode provides some convenience functions like isZero, getZExtValue, and isMinSignedValue that are named identically to those provided by APInt, so we can "skip" getAPIntValue.
2023-03-23[TLI] Fold ~X >/< ~Y --> Y >/< XJun Zhang1-0/+17
Fixes: https://github.com/llvm/llvm-project/issues/61120 Signed-off-by: Jun Zhang <jun@junz.org> Differential Revision: https://reviews.llvm.org/D146512
2023-03-22[CodeGen] Fix type of MachineRegisterInfo::RegAllocHints. NFC.Jay Foad3-6/+6
The first member of the pair should be unsigned instead of Register because it is the hint type, 0 for simple (target independent) hints and other values for target dependent hints. Differential Revision: https://reviews.llvm.org/D146646
2023-03-22[llvm] Use llvm::isNullConstant (NFC)Kazu Hirata1-2/+1
2023-03-21[llvm] Use ConstantInt::{isZero,isOne} (NFC)Kazu Hirata1-2/+2
2023-03-21[SelectionDAG][RISCV] Remove code for handling too small shift type from ↵Craig Topper1-6/+3
SimplifyDemandedBits. This code detected that the type returned from getShiftAmountTy was too small to hold the constant shift amount. But it used the full type size instead of scalar type size leading it to crash for scalable vectors. This code was necessary when getShiftAmountTy would always return the target preferred shift amount type for scalars even when the type was an illegal type larger than the target supported. For vectors, getShiftAmountTy has always returned the vector type. Fortunately, getShiftAmountTy was fixed a while ago to detect that the target's preferred size for scalars is not large enough for the type. So we can delete this code. Switched to use getShiftAmountConstant to further simplify the code. Fixs PR61561.
2023-03-21[DAG] visitABS - use FoldConstantArithmetic to perform constant folding.Simon Pilgrim1-2/+2
Avoid needing to perform extra isConstantIntBuildVectorOrConstantInt checks
2023-03-21[DAG] foldBinOpIntoSelect - use FoldConstantArithmetic instead of getNode() ↵Simon Pilgrim1-8/+6
+ constant check. This prevents unused nodes from being created if the constant check fails. Noticed while triaging D127115 regressions
2023-03-21[Assignment Tracking][NFC] Use BitVectors as masks for SmallVectorsOCHyams1-196/+212
...rather than using DenseMaps to track per-variable information. Rather than tracking 3 maps of {VariableID: SomeInfo} per block, use a BitVector indexed by VariableID to mask 3 vectors of SomeInfo. BlockInfos now need to be initialised with a call to init which sets the BitVector width to the number of partially promoted variables in the function and fills the vectors with Top values. Prior to this patch, in joinBlockInfo, it was necessary to insert Top values into the Join result for variables in A XOR B after joining the variables in A AND B. Now, because the vectors are pre-filled with Top values we need only join the variables A AND B and set the BitVector of tracked variables to A OR B. The patch achieves an average of 0.25% reduction in instructions retired and a 1.1% max-rss for the CTMark suite in LTO-O3-g builds. Reviewed By: scott.linder Differential Revision: https://reviews.llvm.org/D145558
2023-03-20[SPIR-V] Add Machine Value Type for SPIR-V builtinsMichal Paszkowski1-2/+8
Differential Revision: https://reviews.llvm.org/D145703
2023-03-20[NFC][Outliner] Delete default ctors for Candidate & OutlinedFunction.Amara Emerson1-5/+5
I think it's good practice to avoid having default ctors unless they're really valid/useful. For OutlinedFunction the default ctor was used to represent a bail-out value for getOutliningCandidateInfo(), so I changed the API to return an optional<getOutliningCandidateInfo> instead which seems a tad cleaner. Differential Revision: https://reviews.llvm.org/D146375
2023-03-20[DAG] visitTRUNCATE - use FoldConstantArithmetic to perform constant folding.Simon Pilgrim1-5/+2
Avoid needing to perform extra isConstantIntBuildVectorOrConstantInt checks
2023-03-20[DAG] foldBinOpIntoSelect - remove !CanFoldNonConst check. NFC.Simon Pilgrim1-4/+2
These checks are in an if-else chain where CanFoldNonConst is already guaranteed to be false.
2023-03-17[WebAssembly] Support debug info for TLS + global in PIC modeHeejin Ahn2-26/+59
This adds debug info support for - `thread_local` global variables, both in non-PIC and PIC modes - (non-thread_local) Global variables in PIC mode The former needs to read the value from an offset relative to `__tls_base` and the latter an offset from `__memory_base`. The code for doing this overlaps with some of the existing code to add `__stack_pointer` global, so this adds a new member function to add a a global in `TI_GLOBAL_RELOC` mode and use it in all three places. Split DWARF support is currently patchy at best, because the index for `__tls_base` is not fixed after dynamic linking. The preexisting split DWARF support for `__stack_pointer` relies on that in practice it is always index 0. This does similar hardcoding for `__tls_base` and `__memory_base`, but `__tls_base`'s index in dynamic linking is not fixed now (See https://github.com/llvm/llvm-project/blob/19afbfe33156d211fa959dadeea46cd17b9c723c/lld/wasm/Driver.cpp#L786-L823 for details), TLS + dynamic linking will not work at the moment. Fixes https://bugs.chromium.org/p/chromium/issues/detail?id=1416702. Reviewed By: dschuff Differential Revision: https://reviews.llvm.org/D145626
2023-03-17LiveRangeEdit: Use RegisterMatt Arsenault1-6/+4
2023-03-17RegAllocGreedy: Don't use Register referenceMatt Arsenault1-1/+1
2023-03-17[CodeView] Add source languages ObjC and ObjC++Stefan Gränitz1-1/+4
This patch adds llvm::codeview::SourceLanguage entries, DWARF translations, and PDB source file extensions in LLVM and allow LLDB's PDB parsers to recognize them correctly. The CV_CFL_LANG enum in the Visual Studio 2022 documentation https://learn.microsoft.com/en-us/visualstudio/debugger/debug-interface-access/cv-cfl-lang defines: ``` CV_CFL_OBJC = 0x11, CV_CFL_OBJCXX = 0x12, ``` Since the initial commit in D24317, ObjC was emitted as C language and ObjC++ as Masm. Reviewed By: DavidSpickett Differential Revision: https://reviews.llvm.org/D146221
2023-03-17CodeGen: Reorder case handling for is.fpclass legalizationMatt Arsenault2-27/+27
Subnormal and zero checks can be combined into one, so move the code closer to reduce the diff in a future change.
2023-03-17GlobalISel: Use FPClassTest in is.fpclass loweringMatt Arsenault1-8/+8
2023-03-16Recommit DwarfEHPrepare: insert extra unwind paths for stack protector to ↵Tim Northover1-0/+132
instrument This is a mitigation patch for https://bugs.chromium.org/p/llvm/issues/detail?id=30, where existing stack protection is skipped if a function is returned through by an unwinder rather than the normal call/return path. The recent patch D139254 added the ability to instrument a visible unwind path, at least in the IR case (I'm working on the SelectionDAG instrumentation too) but there are still invisible unwinds it can't reach. So this patch adds logic to DwarfEHPrepare that goes through a function, converting any call that might throw into an invoke to a simple resume cleanup, and adding cleanup clauses to existing landingpads that lack them. Obviously we don't really want to do this if it's wasted effort, so I also exposed requiresStackProtector from the actual StackProtector code to skip the extra paths if they won't be used. Changes: * Move test to AArch64 directory as it relies on target presence. * Re-add Dominator-tree maintenance. Accidentally cherry-picked wrong patch. * Skip adding paths on Windows EH functions. https://reviews.llvm.org/D143637
2023-03-16[DAG] TargetLowering::ShrinkDemandedOp - move SmallVTBits iterator inside ↵Simon Pilgrim1-3/+2
for loop. NFC
2023-03-16[DAG] TargetLowering::ShrinkDemandedOp - pull out repeated getValueType ↵Simon Pilgrim1-4/+4
calls. NFC
2023-03-16Revert "DwarfEHPrepare: insert extra unwind paths for stack protector to ↵Tim Northover1-121/+0
instrument" It's caused more failures than are trivially fixable. This reverts commit 203b6f31bb71ce63488eb96b303e000e91aee376.
2023-03-16DwarfEHPrepare: insert extra unwind paths for stack protector to instrumentTim Northover1-0/+121
This is a mitigation patch for https://bugs.chromium.org/p/llvm/issues/detail?id=30, where existing stack protection is skipped if a function is returned through by an unwinder rather than the normal call/return path. The recent patch D139254 added the ability to instrument a visible unwind path, at least in the IR case (I'm working on the SelectionDAG instrumentation too) but there are still invisible unwinds it can't reach. So this patch adds logic to DwarfEHPrepare that goes through a function, converting any call that might throw into an invoke to a simple resume cleanup, and adding cleanup clauses to existing landingpads that lack them. Obviously we don't really want to do this if it's wasted effort, so I also exposed requiresStackProtector from the actual StackProtector code to skip the extra paths if they won't be used. https://reviews.llvm.org/D143637
2023-03-16StackProtector: expose RequiresStackProtector publicly. NFC.Tim Northover1-25/+51
2023-03-16[Assignment Tracking] Do not convert variadic locations to kill locations [3/x]OCHyams1-17/+2
Reviewed By: StephenTozer Differential Revision: https://reviews.llvm.org/D145914
2023-03-16[Assignment Tracking][NFC] Use RawLocationWrapper in VarLocInfo [2/x]OCHyams4-43/+77
Use RawLocationWrapper rather than a Value to represent the location operand(s) so that it's possible to represent multiple location operands. AssignmentTrackingAnalysis still converts variadic debug intrinsics to kill locations so this patch is NFC. Reviewed By: StephenTozer Differential Revision: https://reviews.llvm.org/D145911
2023-03-15[llvm] Use *{Map,Set}::contains (NFC)Kazu Hirata3-7/+6
2023-03-15[DAG] Don't fold zext(logicalshift(zext(x),c)) -> logicalshift(zext(x),c) if ↵Simon Pilgrim1-1/+2
the outer zext is free Avoid widening the shift to a bigger type if the zext would be free anyway Pulled out of D146121
2023-03-15Use *{Map,Set}::contains (NFC)Kazu Hirata1-1/+1
Differential Revision: https://reviews.llvm.org/D146104
2023-03-15[PassManager] Run PassInstrumentation after analysis invalidationArthur Eubanks1-1/+1
This allows instrumentation to inspect cached analyses to verify them. The CGSCC PassInstrumentation previously ran `runAfterPass()` on the original SCC, but really it should be running on UpdatedC when relevant since that's the relevant SCC after the pass. Reviewed By: nikic Differential Revision: https://reviews.llvm.org/D146096
2023-03-15[DAG] TargetLowering::ShrinkDemandedOp - rename Demanded arg to ↵Simon Pilgrim1-2/+2
DemandedBits. NFC Make it clear this is referring to DemandedBits not DemandedElts.
2023-03-15[DAG] mergeStore - peek through truncates when finding dead ↵Simon Pilgrim2-2/+12
store(trunc(load())) patterns Extend the existing store(load()) removal code to account for intermediate truncates that some targets won't remove with canCombineTruncStore - we only care about the load/store MemoryVT. Fixes regression from D146121
2023-03-15[DAG] Fold multiple insert_vector_elt of zero values into an AND maskSimon Pilgrim1-0/+14
This also allows us to make use of the existing isVectorClearMaskLegal shuffle canonicalization Differential Revision: https://reviews.llvm.org/D145939
2023-03-15[AMDGPU] Use UniformityAnalysis in AtomicOptimizerpvanhout1-0/+20
Adds & uses a new `isDivergentUse` API in UA. UniformityAnalysis now requires CycleInfo as well as the new temporal divergence API can query it. ----- Original patch that adds `isDivergentUse` by @sameerds The user of a temporally divergent value is marked as divergent in the uniformity analysis. But the same user may also have been marked divergent for other reasons, thus losing this information about temporal divergence. But some clients need to specificly check for temporal divergence. This change restores such an API, that already existed in DivergenceAnalysis. Reviewed By: sameerds, foad Differential Revision: https://reviews.llvm.org/D146018
2023-03-14Remove -lower-global-dtors-via-cxa-atexit flagJulian Lettner3-15/+2
Remove the `-lower-global-dtors-via-cxa-atexit` escape hatch introduced in D121736 [1], which switched the default lowering of global destructors on MachO to use `__cxa_atexit()` to avoid emitting deprecated `__mod_term_func` sections. I added this flag as an escape hatch in case the switch causes any problems. We didn't discover any problems so now we can remove it. [1] https://reviews.llvm.org/D121736 rdar://90277838 Differential Revision: https://reviews.llvm.org/D145715
2023-03-14[DAG] Match select(icmp(x,y),sub(x,y),sub(y,x)) -> abd(x,y) patternsSimon Pilgrim1-0/+32
Pulled out of PowerPC, and added ABDS support as well (hence the additional v4i32 PPC matches) Differential Revision: https://reviews.llvm.org/D144789
2023-03-14[CodeGen] Use *{Set,Map}::contains (NFC)Kazu Hirata9-17/+16
2023-03-14[DAG] Fold (bitcast (logicop (bitcast x), (c))) -> (logicop x, (bitcast c)) ↵Simon Pilgrim1-0/+16
iff the current logicop type is illegal Try to remove extra bitcasts around logicops if we're dealing with illegal types Fixes the regressions in D145939 Differential Revision: https://reviews.llvm.org/D146032
2023-03-14Reland: [DAG/AMDGPU] Use UniformityAnalysis in DAGISelpvanhout3-15/+16
Switch DAGISel over to UniformityAnalysis, which was one of the last remaining users of the DivergenceAnalysis. No explosions seen during internal testing so this looks like a smooth transition. Reviewed By: sameerds Differential Revision: https://reviews.llvm.org/D145918
2023-03-14[Codegen][ARM][AArch64] Support symmetric operations on complex numbersNicholas Guy1-6/+95
Differential Revision: https://reviews.llvm.org/D142482
2023-03-14Cleanup of Complex Deinterleaving pass (NFCI)Nicholas Guy1-5/+13
Differential Revision: https://reviews.llvm.org/D143177
2023-03-14[RISCV][NFC] Share interleave mask checking logicLuke Lau1-78/+5
This adds two new methods to ShuffleVectorInst, isInterleave and isInterleaveMask, so that the logic to check if a shuffle mask is an interleave can be shared across the TTI, codegen and the interleaved access pass. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D145971
2023-03-14Revert "[DAG/AMDGPU] Use UniformityAnalysis in DAGISel"pvanhout3-16/+15
This reverts commit 0022b5803fd4f5a4e9fcf233267c0ffa1b88f763.
2023-03-14[DAG/AMDGPU] Use UniformityAnalysis in DAGISelpvanhout3-15/+16
Switch DAGISel over to UniformityAnalysis, which was one of the last remaining users of the DivergenceAnalysis. No explosions seen during internal testing so this looks like a smooth transition. Reviewed By: sameerds Differential Revision: https://reviews.llvm.org/D145918
2023-03-13[DAG] Use ISD::isBitwiseLogicOp in AND/OR/XOR checks. NFCI.Simon Pilgrim2-15/+9
There's additional cases we can cleanup (mainly in target code), but this tries to cleanup generic code and PPC which had an equivalent helper.
2023-03-13[MachineCombiner] Preserve debug instruction numberFelipe de Azevedo Piovezan1-0/+11
Each target's `TargetInstrInfo` is responsible for announcing which code patterns it is able to transform during the MachineCombiner pass. Currently, these patterns are applied without preserving the debug instruction number required by the InstrRef implementation of LiveDebugValues. As such, we've seen a number of examples where debug information is dropped for variables in InstrRef mode that were otherwise available in VarLoc mode. This has been observed both in X86 and AArch examples. This commit is an initial attempt at preserving said numbers by changing the general (target agnostic) implementation of TargetInstrInfo: the reassociation pattern must keep the debug number of the "top level" instruction, i.e., the instruction whose value represents the final value of the arithmetic expression. Intermediate values must have their debug number dropped, as they have no equivalent value in the unoptimized code. Future work is required to update each target's `TargetInstrInfo::genAlternativeCodeSequence` method. Differential Revision: https://reviews.llvm.org/D145759
2023-03-12Reland rGf35a09daebd0a90daa536432e62a2476f708150d and ↵Chen Zheng1-7/+48
rG63854f91d3ee1056796a5ef27753648396cac6ec [DAGCombiner] handle more store value forwarding When lowering calls on target like PPC, some stack loads will be generated for by value parameters. Node CALLSEQ_START prevents such loads from being combined. Suggested by @RolandF, this patch removes the unnecessary loads for the byval parameter by extending ForwardStoreValueToDirectLoad Reviewed By: nemanjai, RolandF Differential Revision: https://reviews.llvm.org/D138899
2023-03-13[SelectionDAG] Fix mismatched truncate when combine BUILD_VECTOR with ↵Jun Ma1-1/+1
EXTRACT_SUBVECTOR Just use correct type for truncation. Fixes PR59625 Differential Revision: https://reviews.llvm.org/D145757
2023-03-12[DAG] visitZERO_EXTEND - pull out the repeated SDLoc(N) variablesSimon Pilgrim1-15/+9
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