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2011-07-27Code generation for 'fence' instruction.Eli Friedman3-1/+9
llvm-svn: 136283
2011-07-27Use BlockFrequency instead of uint32_t in BlockFrequencyInfo.Jakub Staszak1-1/+1
llvm-svn: 136278
2011-07-27Remove outdated FIXME comment.Devang Patel1-1/+0
llvm-svn: 136275
2011-07-27Merge the contents from exception-handling-rewrite to the mainline.Bill Wendling3-2/+14
This adds the new instructions 'landingpad' and 'resume'. llvm-svn: 136253
2011-07-27Explicitly cast narrowing conversions inside {}s that will become errors inJeffrey Yasskin1-1/+2
C++0x. llvm-svn: 136211
2011-07-27Revert r136156, which broke several buildbots.Dan Gohman1-1/+14
llvm-svn: 136206
2011-07-27It is quiet possible that inlined function body is split into multiple ↵Devang Patel1-16/+41
chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry. llvm-svn: 136196
2011-07-26Add support for multi-way live range splitting.Jakob Stoklund Olesen1-64/+165
When splitting global live ranges, it is now possible to split for multiple destination intervals at once. Previously, we only had the main and stack intervals. Each edge bundle is assigned to a split candidate, and splitAroundRegion will insert copies between the candidate intervals and the stack interval as needed. The multi-way splitting is used to split around compact regions when enabled with -compact-regions. The best candidate register still gets all the bundles it wants, but everything outside the main interval is first split around compact regions before we create single-block intervals. Compact region splitting still causes some regressions, so it is not enabled by default. llvm-svn: 136186
2011-07-26Print out the MBB live-in registers.Jakob Stoklund Olesen1-0/+4
llvm-svn: 136178
2011-07-26Eliminate copies of undefined values during coalescing.Jakob Stoklund Olesen2-0/+53
These copies would coalesce easily, but the resulting value would be defined by a deleted instruction. Now we also remove the undefined value number from the destination register. This fixes PR10503. llvm-svn: 136174
2011-07-26Delete unnecessarily cautious LastCALLSEQ code.Dan Gohman1-14/+1
llvm-svn: 136156
2011-07-26Add obvious missing case to switch. PR10497.Eli Friedman1-2/+1
llvm-svn: 136130
2011-07-26While extracting lexical scopes from machine instruction stream, work on one ↵Devang Patel1-9/+9
machine basic block at a time. llvm-svn: 136106
2011-07-26SrcDef is only written and never read. Remove it.Duncan Sands1-8/+7
llvm-svn: 136080
2011-07-26Revert to RA_Assign when a virtreg separates into components.Jakob Stoklund Olesen1-1/+3
When dead code elimination deletes a PHI value, the virtual register may split into multiple connected components. In that case, revert each component to the RS_Assign stage. The new components are guaranteed to be smaller (the original value numbers are distributed among the components), so this will always be making progress. The components are now allowed to evict other live ranges or be split again. llvm-svn: 136034
2011-07-26Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to ↵Evan Cheng1-12/+12
createMCObjectStreamer. llvm-svn: 136031
2011-07-26Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng1-2/+3
MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. llvm-svn: 136027
2011-07-25Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to ↵Evan Cheng1-9/+9
createMCAsmBackend. llvm-svn: 136010
2011-07-25Initial implementation of 'fence' instruction, the new C++0x-style ↵Eli Friedman2-0/+5
replacement for llvm.memory.barrier. This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon. llvm-svn: 136009
2011-07-25Make sure this DAGCombine actually returns an UNDEF of the correct type; ↵Eli Friedman1-1/+1
PR10476. llvm-svn: 135993
2011-07-25Rename BlockFrequency to BlockFrequencyInfo and MachineBlockFrequency toJakub Staszak3-12/+13
MachineBlockFrequencyInfo. llvm-svn: 135937
2011-07-25Add an RS_Split2 stage used for loop prevention.Jakob Stoklund Olesen1-15/+24
This mechanism already exists, but the RS_Split2 stage makes it clearer. When live range splitting creates ranges that may not be making progress, they are marked RS_Split2 instead of RS_New. These ranges may be split again, but only in a way that can be proven to make progress. For local ranges, that means they must be split into ranges used by strictly fewer instructions. For global ranges, region splitting is bypassed and the RS_Split2 ranges go straight to per-block splitting. llvm-svn: 135912
2011-07-25Rename live range stages to better reflect how they are used.Jakob Stoklund Olesen1-32/+40
The stage is used to control where a live range is going, not where it is coming from. Live ranges created by splitting will usually be marked RS_New, but some are marked RS_Spill to avoid wasting time trying to split them again. The old RS_Global and RS_Local stages are merged - they are really the same thing for local and global live ranges. llvm-svn: 135911
2011-07-25Convert GetElementPtrInst to use ArrayRef.Jay Foad1-14/+9
llvm-svn: 135904
2011-07-24Never extend live ranges for <undef> uses.Jakob Stoklund Olesen1-1/+1
llvm-svn: 135886
2011-07-24Correctly handle <undef> tied uses when rewriting after a split.Jakob Stoklund Olesen1-8/+4
This fixes PR10463. A two-address instruction with an <undef> use operand was incorrectly rewritten so the def and use no longer used the same register, violating the tie constraint. Fix this by always rewriting <undef> operands with the register a def operand would use. llvm-svn: 135885
2011-07-23Add RAGreedy::calcCompactRegion.Jakob Stoklund Olesen1-0/+46
This method computes the edge bundles that should be live when splitting around a compact region. This is independent of interference. The function returns false if the live range was already a compact region, or the compact region doesn't have any live bundles - it would be the same as splitting around basic blocks. Compact regions are computed using the normal spill placement code. We pretend there is interference in all live-through blocks that don't use the live range. This removes all edges from the Hopfield network used for spill placement, so it converges instantly. llvm-svn: 135847
2011-07-23Fix bug in SplitEditor::splitLiveThroughBlock when switching registers.Jakob Stoklund Olesen1-5/+14
If there is no interference and no last split point, we cannot enterIntvBefore(Stop) - that function needs a real instruction. Use enterIntvAtEnd instead for that very easy case. This code doesn't currently run, it is needed by multi-way splitting. llvm-svn: 135846
2011-07-23Prepare RAGreedy::growRegion for compact regions.Jakob Stoklund Olesen1-1/+8
A split candidate can have a null PhysReg which means that it doesn't map to a real interference pattern. Instead, pretend that all through blocks have interference. This makes it possible to generate compact regions where the live range doesn't go through blocks that don't use it. The live range will still be live between directly connected blocks with uses. Splitting around a compact region tends to produce a live range with a high spill weight, so it may evict a less dense live range. llvm-svn: 135845
2011-07-23Add a simple method for marking blocks with interference in and out.Jakob Stoklund Olesen2-0/+18
This method matches addLinks - All the listed blocks are considered to have interference, so they add a negative bias to their bundles. This could also be done by addConstraints, but that requires building a separate BlockConstraint array. llvm-svn: 135844
2011-07-23Allow null interference cursors to be queried.Jakob Stoklund Olesen2-2/+6
They always report 'no interference'. llvm-svn: 135843
2011-07-23Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where ↵Evan Cheng1-1/+1
they belong. llvm-svn: 135833
2011-07-22Fix more MSVC warnings caused by a cases I missed when convertingJay Foad1-1/+1
ConstantExpr::getGetElementPtr to use ArrayRef. llvm-svn: 135762
2011-07-22Convert IRBuilder::CreateGEP and IRBuilder::CreateInBoundsGEP to useJay Foad1-2/+2
ArrayRef. llvm-svn: 135761
2011-07-22Allow getBlockFreq to return 0.Jakub Staszak1-4/+4
llvm-svn: 135742
2011-07-22Revert patch which broke some IfConversion tests.Jakub Staszak1-10/+29
llvm-svn: 135738
2011-07-22Fix typo in #include which revealed in the case-sensitive filesystem.Jakub Staszak1-1/+1
llvm-svn: 135734
2011-07-21Use MachineBranchProbabilityInfo instead of MachineLoopInfo in IfConversion.Jakub Staszak1-29/+10
llvm-svn: 135724
2011-07-21Add missing getAnalysisUsage in MachineBlockFrequency.Jakub Staszak1-0/+1
llvm-svn: 135714
2011-07-20Refactor.Devang Patel2-31/+42
llvm-svn: 135633
2011-07-20There are two ways to map a variable to its lexical scope. Lexical scope ↵Devang Patel1-2/+10
information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode. llvm-svn: 135629
2011-07-20While emitting constant value, look through derived type and use underlying ↵Devang Patel1-14/+23
basic type to determine size and signness of the constant value. llvm-svn: 135627
2011-07-20Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc.Evan Cheng5-29/+7
There is still a bit more refactoring left to do in Targets. But we are now very close to fixing all the layering issues in MC. llvm-svn: 135611
2011-07-20PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS.Eli Friedman1-5/+5
llvm-svn: 135595
2011-07-20- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng1-21/+2
- Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
2011-07-20Add MCObjectFileInfo and sink the MCSections initialization code fromEvan Cheng6-527/+13
TargetLoweringObjectFileImpl down to MCObjectFileInfo. TargetAsmInfo is done to one last method. It's *almost* gone! llvm-svn: 135569
2011-07-19Fix an obvious typo that's preventing x86 (32-bit) from using .literal16.Evan Cheng1-1/+1
llvm-svn: 135535
2011-07-19Distinguish between two copies of one inlined variable.Devang Patel1-2/+6
llvm-svn: 135528
2011-07-19Convert TargetData::getIndexedOffset to use ArrayRef.Jay Foad2-4/+2
llvm-svn: 135478
2011-07-19Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng1-1/+3
(including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
generated by cgit v1.1 at 2025-11-01 05:48:53 +0000