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path: root/llvm/lib/CodeGen/TargetLoweringBase.cpp
AgeCommit message (Expand)AuthorFilesLines
2025-06-23RuntimeLibcalls: Pass in ABI name from MCOptions (#144894)Matt Arsenault1-1/+2
2025-06-19RuntimeLibcalls: Pass in exception handling type (#144696)Matt Arsenault1-2/+2
2025-06-19RuntimeLibcalls: Pass in FloatABI and EABI type (#144691)Matt Arsenault1-1/+2
2025-06-16[TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if th...Craig Topper1-1/+1
2025-05-27IR: Make Module::getOrInsertGlobal() return a GlobalVariable.Peter Collingbourne1-4/+3
2025-04-23[AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (#130933)Nicholas Guy1-4/+0
2025-04-14[CodeGen] Prune headers and move code out of line for build efficiency, NFC (...Reid Kleckner1-0/+4
2025-03-31Fix crash lowering stack guard on OpenBSD/aarch64. (#125416)34056915821-0/+3
2025-03-07[RISCV][LibCall] Add libcall for i64 -> bf16 (#130024)Jim Lin1-0/+4
2025-02-18[SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (#125207)James Chesterman1-0/+4
2025-02-11[RTLIB] Rename getFSINCOS() to getSINCOS (NFC) (#126705)Benjamin Maxwell1-1/+1
2025-02-11[IR] Add llvm.sincospi intrinsic (#125873)Benjamin Maxwell1-1/+6
2025-02-07[IR] Add `llvm.modf` intrinsic (#121948)Benjamin Maxwell1-3/+8
2025-01-24PreISelIntrinsicLowering: Lower llvm.exp/llvm.exp2 to a loop if scalable vec ...Stephen Long1-0/+11
2025-01-20[SDAG] Add an ISD node to help lower vector.extract.last.active (#118810)Graham Hunter1-0/+3
2024-12-13[GISel] Remove unused DataLayout operand from getApproximateEVTForLLT (#119833)Craig Topper1-1/+1
2024-12-09[TargetLowering] Return Align from getByValTypeAlignment (NFC) (#119233)Sergei Barannikov1-6/+3
2024-11-12[X86][BF16] Add libcall for FP128 -> BF16 (#115825)Feng Zou1-0/+2
2024-11-04SafeStack: Respect alloca addrspace (#112536)Matt Arsenault1-1/+4
2024-10-29[IR] Add `llvm.sincos` intrinsic (#109825)Benjamin Maxwell1-2/+3
2024-10-28Check hasOptSize() in shouldOptimizeForSize() (#112626)Ellis Hoag1-1/+0
2024-10-16[X86][CodeGen] Add base atan2 intrinsic lowering (p4) (#110760)Tex Riddell1-3/+4
2024-09-24[SDAG] Avoid creating redundant stack slots when lowering FSINCOS (#108401)Benjamin Maxwell1-0/+5
2024-09-19Reland "[X86][BF16] Add libcall for F80 -> BF16 (#109116)" (#109143)Phoebe Wang1-0/+2
2024-09-18Revert "[X86][BF16] Add libcall for F80 -> BF16" (#109140)Phoebe Wang1-2/+0
2024-09-18[X86][BF16] Add libcall for F80 -> BF16 (#109116)Phoebe Wang1-0/+2
2024-08-31Revert "[RISCV] RISCV vector calling convention (2/2)" (#97994)Brandon Wu1-10/+2
2024-08-21Scalarize the vector inputs to llvm.lround intrinsic by default. (#101054)Sumanth Gundapaneni1-2/+3
2024-08-15Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (#96649)YunQiang Su1-0/+1
2024-08-14[DAG] Support saturated truncate (#99418)hanbeom1-0/+5
2024-07-24[AMDGPU] Implement llvm.lrint intrinsic lowering (#98931)Sumanth Gundapaneni1-9/+9
2024-07-23[AMDGPU] Implement llvm.lround intrinsic lowering. (#98970)Sumanth Gundapaneni1-7/+10
2024-07-20Reapply "[LLVM][LTO] Factor out RTLib calls and allow them to be dropped (#98...Joseph Huber1-381/+35
2024-07-20ReformatNAKAMURA Takumi1-3/+3
2024-07-20Revert "[LLVM][LTO] Factor out RTLib calls and allow them to be dropped (#985...NAKAMURA Takumi1-3/+384
2024-07-17[LLVM] Add `llvm.experimental.vector.compress` intrinsic (#92289)Lawrence Benson1-0/+3
2024-07-16[LLVM][LTO] Factor out RTLib calls and allow them to be dropped (#98512)Joseph Huber1-384/+3
2024-07-12[NVPTX] Disable all RTLib libcalls (#98672)Joseph Huber1-0/+7
2024-07-11[Darwin] Fix availability of exp10 for watchOS, tvOS, xROS. (#98542)Florian Hahn1-9/+8
2024-07-11[X86][CodeGen] Add base trig intrinsic lowerings (#96222)Farzon Lotfi1-7/+17
2024-07-11[LLVM] Factor disabled Libcalls into the initializer (#98421)Joseph Huber1-0/+138
2024-07-04[SelectionDAG] Remove LegalTypes argument from getShiftAmountTy. NFC (#97757)Craig Topper1-2/+2
2024-07-04[SelectionDAG] Ignore LegalTypes parameter in TargetLoweringBase::getShiftAmo...Craig Topper1-2/+1
2024-06-21Revert "Intrinsic: introduce minimumnum and maximumnum (#93841)"Nikita Popov1-1/+0
2024-06-21Intrinsic: introduce minimumnum and maximumnum (#93841)YunQiang Su1-0/+1
2024-06-17[SelectionDAG] Add support for the 3-way comparison intrinsics [US]CMP (#91871)Poseydon421-0/+3
2024-06-14[CodeGen] Support vectors across all backends (#95518)Farzon Lotfi1-1/+2
2024-06-05[x86] Add tan intrinsic part 4 (#90503)Farzon Lotfi1-1/+3
2024-05-30[SelectionDAG] Add an ISD::CLEAR_CACHE node to lower llvm.clear_cache (#93795)Roger Ferrer Ibáñez1-0/+4
2024-05-29[ValueTypes] Remove MVT::MAX_ALLOWED_VALUETYPE. NFC (#93654)Craig Topper1-3/+0
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