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path: root/llvm/lib/CodeGen/TargetLoweringBase.cpp
AgeCommit message (Expand)AuthorFilesLines
2025-08-27[CodeGen][RISCV] Add support of RISCV nontemporal to vector predication instr...daniel-trujillo-bsc1-0/+28
2025-08-23RuntimeLibcalls: Add entries for stackprotector globals (#154930)Matt Arsenault1-18/+26
2025-08-13[CodeGen] Make OrigTy in CC lowering the non-aggregate type (#153414)Nikita Popov1-6/+6
2025-08-12PreISelIntrinsicLowering: Lower llvm.log to a loop if scalable vec arg (#129744)Stephen Long1-0/+2
2025-08-11[CodeGen] Provide original IR type to CC lowering (NFC) (#152709)Nikita Popov1-1/+1
2025-08-08[IR] Introduce the `ptrtoaddr` instructionAlexander Richardson1-0/+1
2025-08-07[CodeGen] Remove an unnecessary cast (NFC) (#152441)Kazu Hirata1-1/+1
2025-08-07[CodeGen] Move IsFixed into ArgFlags (NFCI) (#152319)Nikita Popov1-1/+1
2025-08-05[LLVM][CGP] Allow finer control for sinking compares. (#151366)Paul Walker1-1/+0
2025-08-04[DAG] Combine `store + vselect` to `masked_store` (#145176)Abhishek Kaushik1-0/+2
2025-07-29[LLVM][Cygwin] Enable conditions that are shared with MinGW (#149638)jeremyd20191-1/+1
2025-07-28[CodeGen] More consistently expand float ops by default (#150597)Nikita Popov1-17/+17
2025-07-15SafeStack: Check if __safestack_pointer_address is available (#147917)Matt Arsenault1-3/+14
2025-07-10TargetLowering: Avoid a use of PointerType::getUnqual (#147884)Matt Arsenault1-1/+3
2025-07-09RuntimeLibcalls: Remove table of soft float compare cond codes (#146082)Matt Arsenault1-33/+73
2025-07-09DAG: Fall back to separate sin and cos when softening sincos (#147468)Matt Arsenault1-0/+8
2025-07-08[DAG] Add generic expansion for ISD::FCANONICALIZE nodes (#142105)Dominik Steenken1-0/+4
2025-07-07DAG: Add RTLIB::getPOW helper (#147274)Matt Arsenault1-0/+4
2025-07-04[llvm] Use llvm::fill instead of std::fill(NFC) (#146911)Austin1-3/+2
2025-06-23RuntimeLibcalls: Pass in ABI name from MCOptions (#144894)Matt Arsenault1-1/+2
2025-06-19RuntimeLibcalls: Pass in exception handling type (#144696)Matt Arsenault1-2/+2
2025-06-19RuntimeLibcalls: Pass in FloatABI and EABI type (#144691)Matt Arsenault1-1/+2
2025-06-16[TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if th...Craig Topper1-1/+1
2025-05-27IR: Make Module::getOrInsertGlobal() return a GlobalVariable.Peter Collingbourne1-4/+3
2025-04-23[AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (#130933)Nicholas Guy1-4/+0
2025-04-14[CodeGen] Prune headers and move code out of line for build efficiency, NFC (...Reid Kleckner1-0/+4
2025-03-31Fix crash lowering stack guard on OpenBSD/aarch64. (#125416)34056915821-0/+3
2025-03-07[RISCV][LibCall] Add libcall for i64 -> bf16 (#130024)Jim Lin1-0/+4
2025-02-18[SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (#125207)James Chesterman1-0/+4
2025-02-11[RTLIB] Rename getFSINCOS() to getSINCOS (NFC) (#126705)Benjamin Maxwell1-1/+1
2025-02-11[IR] Add llvm.sincospi intrinsic (#125873)Benjamin Maxwell1-1/+6
2025-02-07[IR] Add `llvm.modf` intrinsic (#121948)Benjamin Maxwell1-3/+8
2025-01-24PreISelIntrinsicLowering: Lower llvm.exp/llvm.exp2 to a loop if scalable vec ...Stephen Long1-0/+11
2025-01-20[SDAG] Add an ISD node to help lower vector.extract.last.active (#118810)Graham Hunter1-0/+3
2024-12-13[GISel] Remove unused DataLayout operand from getApproximateEVTForLLT (#119833)Craig Topper1-1/+1
2024-12-09[TargetLowering] Return Align from getByValTypeAlignment (NFC) (#119233)Sergei Barannikov1-6/+3
2024-11-12[X86][BF16] Add libcall for FP128 -> BF16 (#115825)Feng Zou1-0/+2
2024-11-04SafeStack: Respect alloca addrspace (#112536)Matt Arsenault1-1/+4
2024-10-29[IR] Add `llvm.sincos` intrinsic (#109825)Benjamin Maxwell1-2/+3
2024-10-28Check hasOptSize() in shouldOptimizeForSize() (#112626)Ellis Hoag1-1/+0
2024-10-16[X86][CodeGen] Add base atan2 intrinsic lowering (p4) (#110760)Tex Riddell1-3/+4
2024-09-24[SDAG] Avoid creating redundant stack slots when lowering FSINCOS (#108401)Benjamin Maxwell1-0/+5
2024-09-19Reland "[X86][BF16] Add libcall for F80 -> BF16 (#109116)" (#109143)Phoebe Wang1-0/+2
2024-09-18Revert "[X86][BF16] Add libcall for F80 -> BF16" (#109140)Phoebe Wang1-2/+0
2024-09-18[X86][BF16] Add libcall for F80 -> BF16 (#109116)Phoebe Wang1-0/+2
2024-08-31Revert "[RISCV] RISCV vector calling convention (2/2)" (#97994)Brandon Wu1-10/+2
2024-08-21Scalarize the vector inputs to llvm.lround intrinsic by default. (#101054)Sumanth Gundapaneni1-2/+3
2024-08-15Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (#96649)YunQiang Su1-0/+1
2024-08-14[DAG] Support saturated truncate (#99418)hanbeom1-0/+5
2024-07-24[AMDGPU] Implement llvm.lrint intrinsic lowering (#98931)Sumanth Gundapaneni1-9/+9
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