aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
AgeCommit message (Expand)AuthorFilesLines
2025-06-27[TargetLowering] Fold (a | b) ==/!= b -> (a & ~b) ==/!= 0 when and-not exists...AZero131-0/+41
2025-06-27DAG: Check libcall function is supported before emission (#144314)Matt Arsenault1-4/+6
2025-06-25[SelectionDAG] Fold undemanded operand to UNDEF for VECTOR_SHUFFLE (#145524)Björn Pettersson1-0/+13
2025-06-22[SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (#1...Iris Shi1-0/+71
2025-06-20[LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (#143540)Paul Walker1-5/+10
2025-06-17DAG: Move soft float predicate management into RuntimeLibcalls (#142905)Matt Arsenault1-2/+3
2025-06-10DAG: Assert fcmp uno runtime calls are boolean values (#142898)Matt Arsenault1-0/+8
2025-06-09[SDAG] Add partial_reduce_sumla node (#141267)Philip Reames1-5/+9
2025-06-04Revert "[SDAG] Fix fmaximum legalization errors (#142170)"Nikita Popov1-10/+8
2025-06-04Revert "[SelectionDAG] Avoid one comparison when legalizing fmaximum (#142732)"Nikita Popov1-8/+11
2025-06-04[SelectionDAG] Avoid one comparison when legalizing fmaximum (#142732)Nikita Popov1-11/+8
2025-06-04expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (#139237)YunQiang Su1-5/+2
2025-06-02[SDAG] Fix fmaximum legalization errors (#142170)Nikita Popov1-8/+10
2025-05-23[GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (#134611)Tim Gymnich1-0/+7
2025-05-21[TargetLowering] Use getExtractSubvector/getExtractVectorElt. NFCCraig Topper1-14/+7
2025-05-19[APInt] Added APInt::clearBits() method (#137098)Liam Semeria1-2/+2
2025-05-16[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)Craig Topper1-24/+20
2025-05-15[llvm] Use llvm::stable_sort (NFC) (#140067)Kazu Hirata1-4/+3
2025-05-13DAG: Stop forcibly adding nsz to expanded minnum/maxnum (#139615)Matt Arsenault1-3/+1
2025-05-12[SelectionDAG] Fix incorrect fold condition in foldSetCCWithFunnelShift. (#13...Rux1241-2/+5
2025-05-04[llvm] Remove unused local variables (NFC) (#138467)Kazu Hirata1-1/+0
2025-05-04[CodeGen] Remove unused local variables (NFC) (#138441)Kazu Hirata1-1/+1
2025-04-23[DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (#1...Simon Pilgrim1-8/+12
2025-04-23[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (#101786)Sergei Barannikov1-2/+3
2025-04-18[DAG] isKnownNeverNaN - add DemandedElts element mask to isKnownNeverNaN call...Simon Pilgrim1-0/+1
2025-04-14[CodeGen] Prune headers and move code out of line for build efficiency, NFC (...Reid Kleckner1-0/+3
2025-04-10[CodeGen] Simplify expandRoundInexactToOdd (#134988)Jay Foad1-25/+7
2025-04-03[SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitca...David Green1-3/+16
2025-03-29[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)Tim Gymnich1-5/+5
2025-03-13[SDAG] Pass pointer type to libcall expansion for SoftenFloatRes stack slots ...Benjamin Maxwell1-1/+4
2025-03-02Move MIPS-specific GPRel32Directive and EK_GPRel32BlockAddress from generic c...Fangrui Song1-11/+0
2025-02-20Revert "AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fm...Matt Arsenault1-3/+2
2025-02-19AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fminimum(m...Changpeng Fang1-2/+3
2025-02-18[SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (#125207)James Chesterman1-0/+52
2025-02-04DAG: Move scalarizeExtractedVectorLoad to TargetLowering (#122670)Matt Arsenault1-0/+74
2025-02-03[AArch64][SDAG] Detect non-zeroes in truncating buildvectors in fshl lowering...David Green1-1/+1
2025-01-27[TargetLowering] Inline the only caller of one of the forceExpandWideMUL func...Craig Topper1-51/+0
2025-01-25[TargetLowering] Pull similar code out of the forceExpandWideMUL into a helpe...Craig Topper1-87/+99
2025-01-23[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)Craig Topper1-14/+63
2025-01-21[TargetLowering] Use getShiftAmountConstant. NFC (#123802)Craig Topper1-6/+3
2025-01-20[SDAG] Add an ISD node to help lower vector.extract.last.active (#118810)Graham Hunter1-0/+38
2025-01-09[SelectionDAG] Use SDNode::op_iterator instead of SDNodeIterator. NFC (#122147)Craig Topper1-7/+5
2025-01-06[DAG] expandUINT_TO_FP - use getShiftAmountConstant helper. NFC.Simon Pilgrim1-2/+1
2024-12-05[NVPTX] Fix lowering of i1 SETCC (#115035)Alex MacLean1-0/+41
2024-12-04[DAG] SimplifyDemandedVectorElts - add handling for INT<->FP conversions (#11...Simon Pilgrim1-0/+9
2024-12-03[TargetLowering] Use Type* instead of EVT in shouldSignExtendTypeInLibCall. (...Craig Topper1-3/+3
2024-12-03[SelectionDAG] Rename CallOptions::IsSExt to IsSigned. NFC (#118574)Craig Topper1-3/+3
2024-11-22[Clang] Attribute NoFPClass should not prevent tail call optimization. (#116741)Félix-Antoine Constantin1-4/+4
2024-11-16[DAG] SimplifyDemandedVectorElts - add SimplifyMultipleUse handling to SEXT/Z...Simon Pilgrim1-0/+5
2024-11-14[TargetLowering] Use Correct VT for Multi-out Asm (#116024)Sam Elliott1-1/+2