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path: root/llvm/lib/CodeGen/PrologEpilogInserter.cpp
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2009-12-28Remove dead store.Bill Wendling1-1/+1
llvm-svn: 92187
2009-12-11Honour setHasCalls() set from isel.Anton Korobeynikov1-2/+2
This is used in some weird cases like general dynamic TLS model. This fixes PR5723 llvm-svn: 91144
2009-12-03improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner1-1/+1
Patch by Howard Hinnant! llvm-svn: 90365
2009-11-12Add a bool flag to StackObjects telling whether they reference spillDavid Greene1-1/+2
slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
2009-10-29When the function is doing dynamic stack realignment, the spill slot will beJim Grosbach1-2/+2
indexed via the stack pointer, even if a frame pointer is present. Update the heuristic to place it nearest the stack pointer in that case, rather than nearest the frame pointer. llvm-svn: 85474
2009-10-21Cleanup of frame index scavenging. Better code flow and more accuratelyJim Grosbach1-35/+60
handles T2 and ARM use cases. llvm-svn: 84761
2009-10-20Better handle instructions that re-def a scratch registerJim Grosbach1-9/+18
llvm-svn: 84657
2009-10-20Register re-use for scavenged frame indices must check for re-deginitionJim Grosbach1-0/+4
of the register in the instruction which kills the scavenged value. llvm-svn: 84641
2009-10-20Enable post-pass frame index register scavenging for ARM and Thumb2Jim Grosbach1-5/+0
llvm-svn: 84585
2009-10-17Distinquish stack slots from other stack objects. They (and fixed objects) ↵Evan Cheng1-1/+1
get FixedStack PseudoSourceValues. llvm-svn: 84326
2009-10-14Make loop not recalc getNumOperands() each time aroundJim Grosbach1-3/+2
llvm-svn: 84138
2009-10-14quiet compiler warningJim Grosbach1-1/+1
llvm-svn: 84133
2009-10-09when previous scratch register is killed, flag the value as no longer trackingJim Grosbach1-1/+4
llvm-svn: 83653
2009-10-08Re-enable register scavenging in Thumb1 by default.Jim Grosbach1-10/+1
llvm-svn: 83521
2009-10-08bugfix. The target may use virtual registers that aren't tracked for re-use ↵Jim Grosbach1-18/+26
but are allocated by the scavenger. The re-use algorithm needs to watch for that. llvm-svn: 83519
2009-10-07reverting thumb1 scavenging default due to test failure while I figure out ↵Jim Grosbach1-1/+10
what's up. llvm-svn: 83501
2009-10-07Enable thumb1 register scavenging by default.Jim Grosbach1-10/+1
llvm-svn: 83496
2009-10-07grammarJim Grosbach1-1/+1
llvm-svn: 83483
2009-10-07add initializers for clarity. Add missing assignment of PrevLastUseOp.Jim Grosbach1-2/+3
llvm-svn: 83481
2009-10-07Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach1-21/+120
a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
2009-09-30Add additional assert() to verify no extraneous use of a scavenged register.Jim Grosbach1-2/+9
llvm-svn: 83163
2009-09-30replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()Jim Grosbach1-3/+1
per customary usage llvm-svn: 83137
2009-09-30fix compiler warningJim Grosbach1-1/+1
llvm-svn: 83132
2009-09-29Simplify the tracking of virtual frame index registers. Ranges cannot overlap,Jim Grosbach1-20/+31
so a simple "current register" will suffice. Also add some additional sanity-checking assertions to make sure things are as we expect. llvm-svn: 83081
2009-09-27Use explicit structs instead of std::pair to map callee saved regs to spill ↵Tilmann Scheller1-4/+4
slots. llvm-svn: 82909
2009-09-25pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.Bob Wilson1-14/+20
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public interface" it must be 8-byte aligned. For the older ARM APCS ABI, the stack alignment is just always 4 bytes. For X86, we currently align SP at entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment is needed at other times, such as for a leaf function. After discussing this with Dan, I decided to go with the approach of adding a new "TransientStackAlignment" field to TargetFrameInfo. This value specifies the stack alignment that must be maintained even in between calls. It defaults to 1 except for ARM, where it is 4. (Some other targets may also want to set this if they have similar stack requirements. It's not currently required for PPC because it sets targetHandlesStackFrameRounding and handles the alignment in target-specific code.) The existing StackAlignment value specifies the alignment upon entry to a function, which is how we've been using it anyway. llvm-svn: 82767
2009-09-24Start of revamping the register scavenging in PEI. ARM Thumb1 is the drivingJim Grosbach1-3/+62
interest for this, as it currently reserves a register rather than using the scavenger for matierializing constants as needed. Instead of scavenging registers on the fly while eliminating frame indices, new virtual registers are created, and then a scavenged collectively in a post-pass over the function. This isolates the bits that need to interact with the scavenger, and sets the stage for more intelligent use, and reuse, of scavenged registers. For the time being, this is disabled by default. Once the bugs are worked out, the current scavenging calls in replaceFrameIndices() will be removed and the post-pass scavenging will be the default. Until then, -enable-frame-index-scavenging enables the new code. Currently, only the Thumb1 back end is set up to use it. llvm-svn: 82734
2009-09-24Fix a hypothetical problem for targets with StackGrowsUp and a non-zeroBob Wilson1-4/+5
LocalAreaOffset. (We don't have any of those right now.) PEI::calculateFrameObjectOffsets includes the absolute value of the LocalAreaOffset in the cumulative offset value used to calculate the stack frame size. It then adds the raw value of the LocalAreaOffset to the stack size. For a StackGrowsDown target, that raw value is negative and has the effect of cancelling out the absolute value that was added earlier, but that obviously won't work for a StackGrowsUp target. Change to subtract the absolute value of the LocalAreaOffset. llvm-svn: 82693
2009-09-23Edit a comment.Bob Wilson1-2/+1
llvm-svn: 82641
2009-09-18Fix a comment typo and some whitespace.Bob Wilson1-2/+2
llvm-svn: 82285
2009-08-22Record variable debug info at ISel time directly.Devang Patel1-5/+0
llvm-svn: 79742
2009-08-15Don't setCalleeSavedInfoValid() until spills are interted.Jakob Stoklund Olesen1-2/+2
In a naked function, the flag is never set and getPristineRegs() returns an empty list. That means naked functions are able to clobber callee saved registers, but that is the whole point of naked functions. This fixes PR4716. llvm-svn: 79096
2009-08-13Add MachineFrameInfo::getPristineRegisters(MBB) method.Jakob Stoklund Olesen1-0/+2
llvm-svn: 78911
2009-07-31Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman1-0/+1
llvm-svn: 77754
2009-07-31Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsageDan Gohman1-1/+0
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes don't modify the LLVM IR CFG, they may modify the MachineFunction CFG, and passes like MachineLoop are registered with isCFGOnly set to true. llvm-svn: 77691
2009-07-31Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and manyDaniel Dunbar1-0/+1
failures when building assorted projects with clang. --- Reverse-merging r77654 into '.': U include/llvm/CodeGen/Passes.h U include/llvm/CodeGen/MachineFunctionPass.h U include/llvm/CodeGen/MachineFunction.h U include/llvm/CodeGen/LazyLiveness.h U include/llvm/CodeGen/SelectionDAGISel.h D include/llvm/CodeGen/MachineFunctionAnalysis.h U include/llvm/Function.h U lib/Target/CellSPU/SPUISelDAGToDAG.cpp U lib/Target/PowerPC/PPCISelDAGToDAG.cpp U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/MachineVerifier.cpp U lib/CodeGen/MachineFunction.cpp U lib/CodeGen/PrologEpilogInserter.cpp U lib/CodeGen/MachineLoopInfo.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp D lib/CodeGen/MachineFunctionAnalysis.cpp D lib/CodeGen/MachineFunctionPass.cpp U lib/CodeGen/LiveVariables.cpp llvm-svn: 77661
2009-07-31Manage MachineFunctions with an analysis Pass instead of the AnnotableDan Gohman1-1/+0
mechanism. To support this, make MachineFunctionPass a little more complete. llvm-svn: 77654
2009-07-17Add support for naked functionsAnton Korobeynikov1-2/+5
llvm-svn: 76198
2009-07-16Assume an inline asm might be a call, so we getDale Johannesen1-0/+4
stack alignment right when it is. This is not ideal but conservatively correct. Adjust a test to compensate for changed stack offset value. gcc.apple/asm-block-57.c llvm-svn: 76120
2009-07-16Scan for presence of calls and determine max callframe size early. To allow ↵Anton Korobeynikov1-25/+36
ProcessFunctionBeforeCalleeSaveScan() use this information llvm-svn: 75942
2009-07-09Targets sometimes assign fixed stack object to spill certain callee-savedEvan Cheng1-1/+6
registers based on dynamic conditions. For example, X86 EBP/RBP, when used as frame register has to be spilled in the first fixed object. It should inform PEI this so it doesn't get allocated another stack object. Also, it should not be spilled as other callee-saved registers but rather its spilling and restoring are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice. llvm-svn: 75116
2009-07-08Use interators instead of counters for loops.Bill Wendling1-16/+21
llvm-svn: 75046
2009-05-13Removing the HasBuiltinSetjmp flag and associated bits. Flagging the presenceJim Grosbach1-1/+1
of exception handling builtin sjlj targets in functions turns out not to be necessary. Marking the intrinsic implementation in the .td file as defining all registers is sufficient to get the context saved properly by the containing function. llvm-svn: 71743
2009-05-13PEI: rename PEI.h to PrologEpilogInserter.h to adhere to file naming standardJohn Mosby1-1/+1
llvm-svn: 71678
2009-05-12Add support for GCC compatible builtin setjmp and longjmp intrinsics. This isJim Grosbach1-1/+1
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but rather used by the front-end as target hooks for exception handling. llvm-svn: 71610
2009-05-12Restructure PEI code:John Mosby1-1307/+67
- moved shrink wrapping code from PrologEpilogInserter.cpp to new file ShrinkWrapping.cpp. - moved PEI pass definition into new shared header PEI.h. llvm-svn: 71588
2009-05-11Apply patch review feedback.Evan Cheng1-0/+2
llvm-svn: 71472
2009-05-11Unbreak non-debug build.Evan Cheng1-0/+8
llvm-svn: 71457
2009-05-11Shrink wrapping in PEI:John Mosby1-610/+1066
- reduces _static_ callee saved register spills and restores similar to Chow's original algorithm. - iterative implementation with simple heuristic limits to mitigate compile time impact. - handles placing spills/restores for multi-entry, multi-exit regions in the Machine CFG without splitting edges. - passes test-suite in LLCBETA mode. Added contains() method to ADT/SparseBitVector. llvm-svn: 71438
2009-03-27Shrink wrapping in PEI: initial release. Finishing development, enable with ↵John Mosby1-43/+913
--shrink-wrap. llvm-svn: 67828
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