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path: root/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
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2012-08-22Tidy up a few more uses of MF.getFunction()->getName().David Blaikie1-2/+1
Based on CR feedback from r162301 and Craig Topper's refactoring in r162347 here are a few other places that could use the same API (& in one instance drop a Function.h dependency). llvm-svn: 162367
2012-06-25Run ProcessImplicitDefs on SSA form where it can be much simpler.Jakob Stoklund Olesen1-256/+97
Implicitly defined virtual registers can simply have the <undef> bit set on all uses, and copies can be turned into implicit defs recursively. Physical registers are a bit trickier. We handle the common case where a physreg def is used by a nearby instruction in the same basic block. For more complicated cases, just leave the IMPLICIT_DEF instruction in. llvm-svn: 159149
2012-06-22Remove ProcessImplicitDefs.h which was unused.Jakob Stoklund Olesen1-2/+27
The ProcessImplicitDefs class can be local to its implementation file. llvm-svn: 159041
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen1-2/+2
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
2012-03-05Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper1-1/+1
static data size. llvm-svn: 152016
2012-02-10RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick1-6/+9
Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
2012-01-25Improve sub-register def handling in ProcessImplicitDefs.Jakob Stoklund Olesen1-9/+10
This boils down to using MachineOperand::readsReg() more. This fixes PR11829 where a use ended up after the first def when lowering REG_SEQUENCE instructions involving IMPLICIT_DEFs. llvm-svn: 148996
2011-07-28Handle REG_SEQUENCE with implicitly defined operands.Jakob Stoklund Olesen1-0/+6
Code like that would only be produced by bugpoint, but we should still handle it correctly. When a register is defined by a REG_SEQUENCE of undefs, the register itself is undef. Previously, we would create a register with uses but no defs. Fixes part of PR10520. llvm-svn: 136401
2011-03-14Place context in member variables instead of passing around pointers.Jakob Stoklund Olesen1-21/+18
Use the opportunity to get rid of the trailing underscore variable names. llvm-svn: 127618
2010-12-29None of the other pass names in CodeGen have terminating periods.Cameron Zwarich1-2/+2
llvm-svn: 122628
2010-10-12Begin adding static dependence information to passes, which will allow us toOwen Anderson1-1/+4
perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. llvm-svn: 116334
2010-10-07Now with fewer extraneous semicolons!Owen Anderson1-1/+1
llvm-svn: 115996
2010-07-21Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson1-2/+2
llvm-svn: 109045
2010-07-16Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.Jakob Stoklund Olesen1-14/+0
TII::isMoveInstr is going tobe completely removed. llvm-svn: 108507
2010-07-14Teach ProcessImplicitDefs to transform more COPY instructions into ↵Evan Cheng1-14/+40
IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. llvm-svn: 108304
2010-07-08Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen1-2/+1
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. llvm-svn: 107879
2010-07-08Remove references to INSERT_SUBREG after de-SSA.Jakob Stoklund Olesen1-15/+0
Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of INSERT_SUBREG. llvm-svn: 107878
2010-07-07Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.Jakob Stoklund Olesen1-0/+15
Buildbot breakage. llvm-svn: 107744
2010-07-06Remove references to INSERT_SUBREG after de-SSAJakob Stoklund Olesen1-15/+0
llvm-svn: 107732
2010-07-06Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass.Jakob Stoklund Olesen1-1/+21
INSERT_SUBREG will now only appear in SSA machine instructions. Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant since partial redef COPY instructions appear. llvm-svn: 107726
2010-07-03Detect and handle COPY in many places.Jakob Stoklund Olesen1-8/+11
This code is transitional, it will soon be possible to eliminate isExtractSubreg, isInsertSubreg, and isMoveInstr in most places. llvm-svn: 107547
2010-05-11It's not safe eliminate copies where src and dst have different sub-register ↵Evan Cheng1-2/+2
indices. llvm-svn: 103450
2010-05-10It's not safe to propagate implicit_def that defines part of a register.Evan Cheng1-0/+2
llvm-svn: 103436
2010-02-15Fix PR6300.Jakob Stoklund Olesen1-3/+2
A virtual register can be used before it is defined in the same MBB if the MBB is part of a loop. Teach the implicit-def pass about this case. llvm-svn: 96279
2010-02-09move target-independent opcodes out of TargetInstrInfoChris Lattner1-7/+7
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
2010-02-04Fix small bug in handling instructions with more than one implicitly defined ↵Jakob Stoklund Olesen1-1/+1
operand. ProcessImplicitDefs would only mark one operand per instruction with <undef>. This fixed PR6086. llvm-svn: 95319
2010-01-05Change errs() to dbgs().David Greene1-1/+1
llvm-svn: 92567
2009-11-26When all defs of a vr are implicit_def, delete all of the defs.Evan Cheng1-2/+6
llvm-svn: 89905
2009-11-25ProcessImplicitDefs should watch out for invalidated iterator and extra ↵Evan Cheng1-14/+45
implicit operands on copies. llvm-svn: 89880
2009-11-16For some targets, a copy can use a register multiple times, e.g. ppc.Evan Cheng1-0/+5
llvm-svn: 88895
2009-11-16Fixes the bug exposed by Anton's test case in PR 5495:Lang Hames1-0/+4
Make sure when ProcessImplicitDefs removes a copy which kills its source reg that it removes the copy from said reg's Kills list. llvm-svn: 88881
2009-11-03The Indexes Patch.Lang Hames1-0/+231
This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
generated by cgit v1.1 at 2025-10-14 13:01:41 +0000