Age | Commit message (Collapse) | Author | Files | Lines | |
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2021-06-21 | Rename MachineMemOperand::getOrdering -> getSuccessOrdering. | Eli Friedman | 1 | -1/+1 | |
Since this method can apply to cmpxchg operations, make sure it's clear what value we're actually retrieving. This will help ensure we don't accidentally ignore the failure ordering of cmpxchg in the future. We could potentially introduce a getOrdering() method on AtomicSDNode that asserts the operation isn't cmpxchg, but not sure that's worthwhile. Differential Revision: https://reviews.llvm.org/D103338 | |||||
2020-09-07 | MachineStableHash.h - remove MachineInstr.h include. NFC. | Simon Pilgrim | 1 | -0/+1 | |
Use forward declarations and move the include to MachineStableHash.cpp | |||||
2020-09-03 | [MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo) | Puyan Lotfi | 1 | -0/+193 | |
This hashing scheme has been useful out of tree, and I want to start experimenting with it. Specifically I want to experiment on the MIRVRegNamer, MIRCanononicalizer, and eventually the MachineOutliner. This diff is a first step, that optionally brings stable hashing to the MIRVRegNamer (and as a result, the MIRCanonicalizer). We've tested this hashing scheme on a lot of MachineOperand types that llvm::hash_value can not handle in a stable manner. This stable hashing was also the basis for "Global Machine Outliner for ThinLTO" in EuroLLVM 2020 http://llvm.org/devmtg/2020-04/talks.html#TechTalk_58 Credits: Kyungwoo Lee, Nikolai Tillmann Differential Revision: https://reviews.llvm.org/D86952 |