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path: root/llvm/lib/CodeGen/MachineInstr.cpp
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2004-07-09* Doxygenify commentsMisha Brukman1-104/+96
* Fix spacing, grammar in comment * Make code layout consistent * Wrap code at 80 cols * Delete spurious blank lines No functional changes. llvm-svn: 14721
2004-07-04Add #include <iostream> since Value.h does not #include it any more.Reid Spencer1-0/+2
llvm-svn: 14622
2004-06-25Made a fix so that you can print out MachineInstrs that belong to a ↵Tanya Lattner1-5/+18
MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function. llvm-svn: 14389
2004-06-17Make debugging dumps w/ multiple MachineBBs for a given LLVM BB readable.Brian Gaeke1-4/+4
llvm-svn: 14205
2004-06-02Adjust to new TargetMachine interfaceChris Lattner1-1/+1
llvm-svn: 13956
2004-05-24Changed clone to be const.Tanya Lattner1-1/+7
Changed copy constructor to set parent, prev, and next pointers to null. llvm-svn: 13706
2004-05-23Fixed up my changes to add support for cloning Machine Instructions.Tanya Lattner1-2/+3
llvm-svn: 13665
2004-05-23Adding support to clone MachineInstrTanya Lattner1-0/+19
llvm-svn: 13661
2004-03-03Make MachineOperand's value named 'contents'. Make really, really sureBrian Gaeke1-6/+6
it is always completely initialized and copied. Also, fix up many comments and asserts. llvm-svn: 12100
2004-02-29int64_t -> intChris Lattner1-1/+1
llvm-svn: 11977
2004-02-27Fix crash caused by passing register 0 toAlkis Evlogimenos1-1/+1
MRegisterInfo::isPhysicalRegister(). llvm-svn: 11894
2004-02-23Fix bugs in finegrainificationChris Lattner1-1/+3
llvm-svn: 11758
2004-02-23Finegrainify namespacificationChris Lattner1-9/+7
llvm-svn: 11757
2004-02-19Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printedChris Lattner1-6/+16
by operator<< on MachineInstr's, and looking up what register "24" is all of the time was greatly annoying. llvm-svn: 11623
2004-02-16Add LeakDetection to MachineInstr.Alkis Evlogimenos1-0/+12
Move out of line member functions of MachineBasicBlock to MachineBasicBlock.cpp. llvm-svn: 11497
2004-02-13Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos1-5/+5
llvm-svn: 11393
2004-02-13Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.Brian Gaeke1-36/+32
Rename SetMachineOperandConst's formal parameters to match other methods here. Mark some methods as being used only by the SPARC back-end. Fix a missing-paren bug in OutputValue(). llvm-svn: 11363
2004-02-12Add parent pointer to MachineInstr that points to owningAlkis Evlogimenos1-7/+14
MachineBasicBlock. Also change opcode to a short and numImplicitRefs to an unsigned char so that overall MachineInstr's size stays the same. llvm-svn: 11357
2004-02-12Rename the opCode instance variable to OpcodeChris Lattner1-29/+15
llvm-svn: 11348
2004-02-12This field is never readChris Lattner1-3/+0
llvm-svn: 11346
2004-02-04Modify the two address instruction pass to remove the duplicateAlkis Evlogimenos1-18/+0
operand of the instruction and thus simplify the register allocation. llvm-svn: 11124
2004-02-03When an instruction like: A += B had both A and B virtual registersAlkis Evlogimenos1-0/+18
spilled, A was loaded from its stack location twice. This fixes the bug. llvm-svn: 11093
2003-12-14Change interface of MachineOperand as follows:Alkis Evlogimenos1-28/+33
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. llvm-svn: 10461
2003-11-11Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke1-2/+6
llvm-svn: 9903
2003-10-20Added LLVM project notice to the top of every C++ source file.John Criswell1-0/+7
Header files will be on the way. llvm-svn: 9298
2003-09-17Fixed spelling.Misha Brukman1-5/+5
llvm-svn: 8588
2003-08-07Fix assertion in MachineInstr::substituteValue().Vikram S. Adve1-2/+2
llvm-svn: 7675
2003-08-05Do not insert physical regsiters into the regsUsed setChris Lattner1-3/+0
llvm-svn: 7617
2003-08-05All callers of these methods actually wanted them to preserve the flags,Chris Lattner1-26/+5
so get rid of the def/use parameters that were getting passed in. **** This now changes the semantics of these methods to preserve the flags, not clobber them! llvm-svn: 7602
2003-08-03Simplify code, eliminating the need for the X86 isVoid target instr flagChris Lattner1-3/+4
llvm-svn: 7534
2003-08-03Remove using declChris Lattner1-3/+1
llvm-svn: 7531
2003-07-10Change interface to MachineInstr::substituteValue to specify more preciselyVikram S. Adve1-7/+21
which args can be substituted: defsOnly, defsAndUses or usesOnly. llvm-svn: 7154
2003-05-31Allow explicit physical registers for implicit operands.Vikram S. Adve1-1/+11
llvm-svn: 6468
2003-05-27(1) Added special register class containing (for now) %fsr.Vikram S. Adve1-15/+17
Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". llvm-svn: 6341
2003-01-15Remove obsolete ctorChris Lattner1-9/+0
llvm-svn: 5301
2003-01-14Rename MachineInstrInfo -> TargetInstrInfoChris Lattner1-3/+3
llvm-svn: 5272
2003-01-13Add support for 3 new forms of MachineOperandChris Lattner1-18/+39
llvm-svn: 5217
2002-12-28* Add printing support for FrameIndex operandsChris Lattner1-24/+29
llvm-svn: 5194
2002-12-15Implement printing of MBB argumentsChris Lattner1-17/+28
llvm-svn: 5053
2002-11-17Print is const!Chris Lattner1-1/+1
llvm-svn: 4737
2002-11-17Remove only uses of markDef/markDefAndUse methodsChris Lattner1-6/+9
llvm-svn: 4719
2002-10-30Remove fixmeChris Lattner1-1/+1
llvm-svn: 4447
2002-10-30Add special code to make printing SSA form machine instructions nicerChris Lattner1-4/+15
llvm-svn: 4446
2002-10-30Use MRegisterInfo, if available, to print symbolic register namesChris Lattner1-7/+14
llvm-svn: 4438
2002-10-30Implement structured machine code printingChris Lattner1-7/+102
llvm-svn: 4435
2002-10-29Implement autoinserting ctorChris Lattner1-0/+20
llvm-svn: 4426
2002-10-29Remove separate vector of implicit refs from MachineInstr, andVikram S. Adve1-11/+24
instead record them as extra operands in the operands[] vector. Also, move CallArgsDescriptor into this class instead of making it an annotation on the machine instruction. llvm-svn: 4399
2002-10-29Move TargetInstrDescriptors extern to the one .cpp file that refers to it:Chris Lattner1-0/+8
MachineInstr.cpp llvm-svn: 4392
2002-10-29Use higher level methods, don't use TargetInstrDescriptors directly!Chris Lattner1-1/+1
llvm-svn: 4389
2002-10-28Remove all traces of the "Opcode Mask" field in the MachineInstr classChris Lattner1-4/+3
llvm-svn: 4359
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