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path: root/llvm/lib/CodeGen/LiveVariables.cpp
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2012-06-23Teach LiveVariables to handle <undef> operands.Jakob Stoklund Olesen1-3/+5
It's simple: Don't treat <undef> operands as uses, and don't assume a virtual register has a defining instruction unless a real use has been seen. llvm-svn: 159061
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen1-32/+29
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). llvm-svn: 157854
2012-04-01Fix typo.Lang Hames1-1/+1
llvm-svn: 153846
2012-03-09Assert on SSA errors in LiveVariables.Jakob Stoklund Olesen1-0/+1
All uses of a virtual register must be dominated by its def. llvm-svn: 152449
2012-03-05Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper1-17/+17
static data size. llvm-svn: 152016
2012-02-10RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick1-0/+8
Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. llvm-svn: 150226
2012-02-03whitespaceAndrew Trick1-3/+3
llvm-svn: 149671
2012-01-21Fix an obvious typo.Evan Cheng1-1/+1
llvm-svn: 148622
2012-01-21Handle register masks in LiveVariables.Jakob Stoklund Olesen1-0/+30
A register mask operand kills any live physreg that isn't preserved. Unlike an implicit-def operand, the clobbered physregs are never live afterwards. This means LiveVariables has to track a much smaller number of live physregs, and it should spend much less time in addRegisterDead(). llvm-svn: 148609
2012-01-20Delete an unused member variable.Jakob Stoklund Olesen1-1/+0
llvm-svn: 148594
2012-01-14After r147827 and r147902, it's now possible for unallocatable registers to beEvan Cheng1-6/+22
live across BBs before register allocation. This miscompiled 197.parser when a cmp + b are optimized to a cbnz instruction even though the CPSR def is live-in a successor. cbnz r6, LBB89_12 ... LBB89_12: ble LBB89_1 The fix consists of two parts. 1) Teach LiveVariables that some unallocatable registers might be liveouts so don't mark their last use as kill if they are. 2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional branch does not kill CPSR. rdar://10676853 llvm-svn: 148168
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng1-2/+2
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
2011-12-06First chunk of MachineInstr bundle support.Evan Cheng1-1/+1
1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs llvm-svn: 145975
2011-08-12Silence a bunch (but not all) "variable written but not read" warningsDuncan Sands1-1/+1
when building with assertions disabled. llvm-svn: 137460
2011-03-08Reduce vector reallocations.Benjamin Kramer1-4/+2
llvm-svn: 127254
2011-01-08Use an IndexedMap for LiveVariables::VirtRegInfo.Jakob Stoklund Olesen1-25/+10
Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow iteration over virtual registers without depending on the representation of virtual register numbers. llvm-svn: 123098
2010-10-12Begin adding static dependence information to passes, which will allow us toOwen Anderson1-1/+4
perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. llvm-svn: 116334
2010-10-07Now with fewer extraneous semicolons!Owen Anderson1-1/+1
llvm-svn: 115996
2010-08-16Remove unused functions.Jakob Stoklund Olesen1-15/+0
llvm-svn: 111156
2010-07-21Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson1-1/+2
llvm-svn: 109045
2010-06-14fix a -Wbool-conversions warning from clang.Chris Lattner1-1/+1
llvm-svn: 105942
2010-06-05Fix some liveout handling related to tail calls, see comments.Dale Johannesen1-1/+6
I don't think this ever resulted in problems on x86, but it would on ARM. llvm-svn: 105509
2010-04-13Eliminate MachineBasicBlock::const_livein_iterator and makeDan Gohman1-1/+1
MachineBasicBlock::livein_iterator a const_iterator, because clients shouldn't ever be using the iterator interface to mutate the livein set. llvm-svn: 101147
2010-03-26LiveVariables should clear kill / dead markers first. This allows us to ↵Evan Cheng1-3/+7
remove a hack in the scheduler. llvm-svn: 99597
2010-03-05Better handling of dead super registers in LiveVariables. We used to do this:Jakob Stoklund Olesen1-21/+21
CALL ... %RAX<imp-def> ... [not using %RAX] %EAX = ..., %RAX<imp-use, kill> RET %EAX<imp-use,kill> Now we do this: CALL ... %RAX<imp-def, dead> ... [not using %RAX] %EAX = ... RET %EAX<imp-use,kill> By not artificially keeping %RAX alive, we lower register pressure a bit. The correct number of instructions for 2008-08-05-SpillerBug.ll is obviously 55, anybody can see that. Sheesh. llvm-svn: 97838
2010-02-23Keep track of phi join registers explicitly in LiveVariables.Jakob Stoklund Olesen1-0/+1
Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply defined registers. That doesn't work if the phi join is implicitly defined in all but one of the predecessors. llvm-svn: 96994
2010-02-09move target-independent opcodes out of TargetInstrInfoChris Lattner1-5/+4
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
2010-02-09Skip DEBUG_VALUE in some places where it was affecting codegen.Dale Johannesen1-0/+2
llvm-svn: 95647
2010-01-07Remove dead variable.Benjamin Kramer1-7/+2
llvm-svn: 92919
2010-01-04Change errs() to dbgs().David Greene1-6/+7
llvm-svn: 92532
2009-12-01Move PHIElimination::isLiveOut method to LiveVariables.Jakob Stoklund Olesen1-0/+45
We want LiveVariables clients to use methods rather than accessing the getVarInfo data structure directly. That way it will be possible to change the LiveVariables representation. llvm-svn: 90240
2009-12-01Fix PR5614: parts of a physical register def may be killed the rest.Evan Cheng1-1/+47
llvm-svn: 90180
2009-11-21Be more clever about calculating live variables through new basic blocks.Jakob Stoklund Olesen1-19/+29
When splitting a critical edge, the registers live through the edge are: - Used in a PHI instruction, or - Live out from the predecessor, and - Live in to the successor. This allows the coalescer to eliminate even more phi joins. llvm-svn: 89530
2009-11-13Fix PR5410: LiveVariables lost subreg def:Evan Cheng1-1/+7
D0<def,dead> = ... ... = S0<use, kill> S0<def> = ... ... D0<def> = The first D0 def is correctly marked dead, however, livevariables should have added an implicit def of S0 or we end up with a use without a def. llvm-svn: 88690
2009-11-11Fix liveness calculation when splitting critical edges during PHI elimination.Jakob Stoklund Olesen1-20/+21
- Edges are split before any phis are eliminated, so the code is SSA. - Create a proper IR BasicBlock for the split edges. - LiveVariables::addNewBlock now has same syntax as MachineDominatorTree::addNewBlock. Algorithm calculates predecessor live-out set rather than successor live-in set. This feature still causes some miscompilations. llvm-svn: 86867
2009-11-10Teach PHIElimination to split critical edges when -split-phi-edges is enabled.Jakob Stoklund Olesen1-0/+40
Critical edges leading to a PHI node are split when the PHI source variable is live out from the predecessor block. This help the coalescer eliminate more PHI joins. llvm-svn: 86725
2009-10-14When LiveVariables is adding implicit-def to model "partial dead", add the ↵Evan Cheng1-1/+12
earlyclobber marker if the superreg def has it. llvm-svn: 84153
2009-09-24Clean up LiveVariables and change how it deals with partial updates and ↵Evan Cheng1-198/+64
kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate. llvm-svn: 82676
2009-09-23Fix PR5024. LiveVariables physical register defs should *commit* only after allEvan Cheng1-32/+93
of the defs are processed. Also fix a implicit_def propagation bug: a implicit_def of a physical register should be applied to uses of the sub-registers. llvm-svn: 82616
2009-09-22Fix PR5024. LiveVariables::FindLastPartialDef should return a set of ↵Evan Cheng1-6/+22
sub-registers that were defined by the last partial def, not just a single sub-register. llvm-svn: 82535
2009-08-23remove the last uses of Config/alloca.hChris Lattner1-1/+0
llvm-svn: 79873
2009-08-23remove various std::ostream version of printing methods fromChris Lattner1-6/+6
MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) llvm-svn: 79813
2009-07-31Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsageDan Gohman1-0/+1
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes don't modify the LLVM IR CFG, they may modify the MachineFunction CFG, and passes like MachineLoop are registered with isCFGOnly set to true. llvm-svn: 77691
2009-07-31Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and manyDaniel Dunbar1-1/+0
failures when building assorted projects with clang. --- Reverse-merging r77654 into '.': U include/llvm/CodeGen/Passes.h U include/llvm/CodeGen/MachineFunctionPass.h U include/llvm/CodeGen/MachineFunction.h U include/llvm/CodeGen/LazyLiveness.h U include/llvm/CodeGen/SelectionDAGISel.h D include/llvm/CodeGen/MachineFunctionAnalysis.h U include/llvm/Function.h U lib/Target/CellSPU/SPUISelDAGToDAG.cpp U lib/Target/PowerPC/PPCISelDAGToDAG.cpp U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/MachineVerifier.cpp U lib/CodeGen/MachineFunction.cpp U lib/CodeGen/PrologEpilogInserter.cpp U lib/CodeGen/MachineLoopInfo.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp D lib/CodeGen/MachineFunctionAnalysis.cpp D lib/CodeGen/MachineFunctionPass.cpp U lib/CodeGen/LiveVariables.cpp llvm-svn: 77661
2009-07-31Manage MachineFunctions with an analysis Pass instead of the AnnotableDan Gohman1-0/+1
mechanism. To support this, make MachineFunctionPass a little more complete. llvm-svn: 77654
2009-07-06Avoid adding a duplicate def. This fixes PR4478.Evan Cheng1-2/+11
llvm-svn: 74857
2009-06-20Fix PR4419: handle defs of partial uses.Evan Cheng1-7/+6
llvm-svn: 73816
2009-06-03If there is a def of a super-register followed by a use of a sub-register, ↵Evan Cheng1-14/+0
do *not* add an implicit def of the sub-register. e.g. EAX = ..., AX<imp-def> ... = AX This creates a double-def. Apparently this used to be necessary but is no longer needed. Thanks to Anton for pointing this out. Anton, I cannot create a test case without your uncommitted ARM patches. Please check in a test case for me. llvm-svn: 72755
2009-05-26LiveVariables::VarInfo contains an AliveBlocks BitVector, which has as manyJeffrey Yasskin1-9/+8
entries as there are basic blocks in the function. LiveVariables::getVarInfo creates a VarInfo struct for every register in the function, leading to quadratic space use. This patch changes the BitVector to a SparseBitVector, which doesn't help the worst-case memory use but does reduce the actual use in very long functions with short-lived variables. llvm-svn: 72426
2009-05-26Eliminate VarInfo::UsedBlocks.Evan Cheng1-5/+0
llvm-svn: 72411
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