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path: root/llvm/lib/CodeGen/LiveRangeEdit.cpp
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2014-12-24LiveRangeEdit: Check for completely empy subranges after removing ValNos.Matthias Braun1-0/+1
Completely empty subranges are not allowed and must be removed when subreg liveness is enabled. llvm-svn: 224804
2014-12-11LiveInterval: Use range based for loops for subregister ranges.Matthias Braun1-4/+3
llvm-svn: 223991
2014-12-10LiveInterval: Use more range based for loops for value numbers and segments.Matthias Braun1-3/+1
llvm-svn: 223978
2014-12-10LiveRangeEdit: Adapt eliminateDeadDef() to subregister liveness.Matthias Braun1-1/+9
llvm-svn: 223882
2014-11-17Add missing semicolon from r222118.Craig Topper1-1/+1
llvm-svn: 222119
2014-11-17Move register class name strings to a single array in MCRegisterInfo to ↵Craig Topper1-2/+5
reduce static table size and number of relocation entries. Indices into the table are stored in each MCRegisterClass instead of a pointer. A new method, getRegClassName, is added to MCRegisterInfo and TargetRegisterInfo to lookup the string in the table. llvm-svn: 222118
2014-07-29Add TargetInstrInfo interface isAsCheapAsAMove.Jiangning Liu1-1/+1
llvm-svn: 214158
2014-04-22[Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth1-1/+2
define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind of ODR violation yet, it is likely to grow support for it in the future. It also removes one layer of macro pollution across all the included headers. Other sub-trees will follow. llvm-svn: 206837
2014-04-14[C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper1-4/+4
instead of comparing to nullptr. llvm-svn: 206142
2014-03-17Switch a number of loops in lib/CodeGen over to range-based for-loops, now thatOwen Anderson1-4/+2
the MachineRegisterInfo iterators are compatible with it. llvm-svn: 204075
2014-03-13Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson1-2/+2
operator* on the by-operand iterators to return a MachineOperand& rather than a MachineInstr&. At this point they almost behave like normal iterators! Again, this requires making some existing loops more verbose, but should pave the way for the big range-based for-loop cleanups in the future. llvm-svn: 203865
2013-11-11CalcSpillWeights: give a better describing name to calculateSpillWeightsArnaud A. de Grandmaison1-1/+1
Besides, this relates it more obviously to the VirtRegAuxInfo::calculateSpillWeightAndHint. No functionnal change. llvm-svn: 194404
2013-10-10Represent RegUnit liveness with LiveRange instanceMatthias Braun1-3/+3
Previously LiveInterval has been used, but having a spill weight and register number is unnecessary for a register unit. llvm-svn: 192397
2013-10-10Pass LiveQueryResult by valueMatthias Braun1-1/+1
This makes the API a bit more natural to use and makes it easier to make LiveRanges implementation details private. llvm-svn: 192394
2013-08-30Use LiveRangeQuery for instruction-level liveness queries.Andrew Trick1-1/+1
Remove redundant or bug-prone LiveInterval APIs. llvm-svn: 189685
2013-08-30Replace LiveInterval::killedAt with isKilledAtInstr.Andrew Trick1-1/+1
Return true for LRGs that end at EarlyClobber or Register slots. llvm-svn: 189642
2013-08-14Auto-compute live intervals on demand.Mark Lacey1-3/+11
When new virtual registers are created during splitting/spilling, defer creation of the live interval until we need to use the live interval. Along with the recent commits to notify LiveRangeEdit when new virtual registers are created, this makes it possible for functions like TargetInstrInfo::loadRegFromStackSlot() and TargetInstrInfo::storeRegToStackSlot() to create multiple virtual registers as part of the process of generating loads/stores for different register classes, and then have the live intervals for those new registers computed when they are needed. llvm-svn: 188437
2013-08-14Notify LiveRangeEdit of new virtual registers.Mark Lacey1-2/+11
Add a delegate class to MachineRegisterInfo with a single virtual function, MRI_NoteNewVirtualRegister(). Update LiveRangeEdit to inherit from this delegate class and override the definition of the callback with an implementation that tracks the newly created virtual registers. llvm-svn: 188435
2013-08-14Track new virtual registers by register number.Mark Lacey1-3/+3
Track new virtual registers by register number, rather than by the live interval created for them. This is the first step in separating the creation of new virtual registers and new live intervals. Eventually live intervals will be created and populated on demand after the virtual registers have been created and used in instructions. llvm-svn: 188434
2013-08-14Remove unnecessary parameter to RenumberValues.Jakob Stoklund Olesen1-1/+1
Patch by Matthias Braun! llvm-svn: 188393
2013-06-22Prevent LiveRangeEdit from deleting bundled instructions.Andrew Trick1-0/+4
We have no targets on trunk that bundle before regalloc. However, we have been advertising regalloc as bundle safe for use with out-of-tree targets. We need to at least contain the parts of the code that are still unsafe. llvm-svn: 184620
2013-06-21Handle more cases in LiveRangeEdit::eliminateDeadDefs.Andrew Trick1-0/+9
Live intervals for dead physregs may be created during coalescing. We need to update these in the event that their instruction goes away. crash.ll is the unit test that catches it when MI sched is enabled on X86. llvm-svn: 184572
2013-06-21Refactor LiveRangeEdit::eliminateDeadDefs.Andrew Trick1-95/+95
I want to add logic to handle more cases. llvm-svn: 184571
2013-06-21whitespaceAndrew Trick1-2/+2
llvm-svn: 184570
2013-06-17Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.Benjamin Kramer1-3/+5
The main advantages here are way better heuristics, taking into account not just loop depth but also __builtin_expect and other static heuristics and will eventually learn how to use profile info. Most of the work in this patch is pushing the MachineBlockFrequencyInfo analysis into the right places. This is good for a 5% speedup on zlib's deflate (x86_64), there were some very unfortunate spilling decisions in its hottest loop in longest_match(). Other benchmarks I tried were mostly neutral. This changes register allocation in subtle ways, update the tests for it. 2012-02-20-MachineCPBug.ll was deleted as it's very fragile and the instruction it looked for was gone already (but the FileCheck pattern picked up unrelated stuff). llvm-svn: 184105
2013-03-18Add some constantness.Jakub Staszak1-1/+1
llvm-svn: 177356
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth1-2/+2
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
2012-11-28Make the LiveRegMatrix analysis available to targets.Jakob Stoklund Olesen1-1/+1
No functional change, just moved header files. Targets can inject custom passes between register allocation and rewriting. This makes it possible to tweak the register allocation before rewriting, using the full global interference checking available from LiveRegMatrix. llvm-svn: 168806
2012-10-16Avoid rematerializing a redef immediately after the old def.Jakob Stoklund Olesen1-0/+7
PR14098 contains an example where we would rematerialize a MOV8ri immediately after the original instruction: %vreg7:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 %vreg22:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 Besides being pointless, it is also wrong since the original instruction only redefines part of the register, and the value read by the new instruction is wrong. The problem was the LiveRangeEdit::allUsesAvailableAt() didn't special-case OrigIdx == UseIdx and found the wrong SSA value. llvm-svn: 166068
2012-10-15Remove LIS::isAllocatable() and isReserved() helpers.Jakob Stoklund Olesen1-1/+1
All callers can simply use the corresponding MRI functions. llvm-svn: 165985
2012-09-27Avoid dereferencing a NULL pointer.Jakob Stoklund Olesen1-1/+1
Fixes PR13943. llvm-svn: 164778
2012-08-02Avoid creating dangling physreg live ranges during DCE.Jakob Stoklund Olesen1-6/+30
LiveRangeEdit::eliminateDeadDefs() can delete a dead instruction that reads unreserved physregs. This would leave the corresponding regunit live interval dangling because we don't have shrinkToUses() for physical registers. Fix this problem by turning the instruction into a KILL instead of deleting it. This happens in a landing pad in test/CodeGen/X86/2012-05-19-CoalescerCrash.ll: %vreg27<def,dead> = COPY %EDX<kill>; GR32:%vreg27 becomes: KILL %EDX<kill> An upcoming fix to the machine verifier will catch problems like this by verifying regunit live intervals. This fixes PR13498. I am not including the test case from the PR since we already have one exposing the problem once the verifier is fixed. llvm-svn: 161182
2012-07-20Avoid folding loads that are unsafe to move.Jakob Stoklund Olesen1-0/+13
LiveRangeEdit::foldAsLoad() can eliminate a register by folding a load into its only use. Only do that when the load is safe to move, and it won't extend any live ranges. This fixes PR13414. llvm-svn: 160575
2012-06-22Use MRI::isConstantPhysReg() to check remat feasibility.Jakob Stoklund Olesen1-4/+8
Don't depend on LiveIntervals::hasInterval() to determine if a physreg is reserved and constant. llvm-svn: 159013
2012-05-22Only erase virtregs with no uses left.Jakob Stoklund Olesen1-4/+15
Also make sure registers aren't erased twice if the dead def mentions the register twice. This fixes PR12911. llvm-svn: 157254
2012-05-19Fix 12892.Jakob Stoklund Olesen1-0/+4
Dead code elimination during coalescing could cause a virtual register to be split into connected components. The following rewriting would be confused about the already joined copies present in the code, but without a corresponding value number in the live range. Erase all joined copies instantly when joining intervals such that the MI and LiveInterval representations are always in sync. llvm-svn: 157135
2012-05-19Allow LiveRangeEdit to be created with a NULL parent.Jakob Stoklund Olesen1-2/+2
The dead code elimination with callbacks is still useful. llvm-svn: 157100
2012-05-18Modernize naming convention for class members.Jakob Stoklund Olesen1-20/+20
No functional change. llvm-svn: 157079
2012-04-03Removed one last bad continue statement meant to be removed in r153914.Pete Cooper1-1/+0
llvm-svn: 153975
2012-04-03Fixes to r153903. Added missing explanation of behaviour when the ↵Pete Cooper1-5/+5
VirtRegMap is NULL. Also changed it in this case to just avoid updating the map, but live ranges or intervals will still get updated and created llvm-svn: 153914
2012-04-02Moved LiveRangeEdit.h so that it can be called from other parts of the ↵Pete Cooper1-1/+1
backend, not just libCodeGen llvm-svn: 153906
2012-04-02Refactored the LiveRangeEdit interface so that MachineFunction, ↵Pete Cooper1-46/+28
TargetInstrInfo, MachineRegisterInfo, LiveIntervals, and VirtRegMap are all passed into the constructor and stored as members instead of passed in to each method. llvm-svn: 153903
2012-02-28Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. TheseLang Hames1-5/+0
methods are no longer needed now that LinearScan has gone away. (Contains tweaks trivialSpillEverywhere to enable the removal of getNewVRegs). llvm-svn: 151658
2012-02-17Tidy up.Jim Grosbach1-1/+1
llvm-svn: 150820
2011-12-20Unweaken vtables as per ↵David Blaikie1-0/+2
http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
2011-12-12Fixed register allocator splitting a live range on a spilling variable.Pete Cooper1-1/+17
If we create new intervals for a variable that is being spilled, then those new intervals are not guaranteed to also spill. This means that anything reading from the original spilling value might not get the correct value if spills were missed. Fixes <rdar://problem/10546864> llvm-svn: 146428
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng1-2/+2
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
2011-11-13Rename SlotIndexes to match how they are used.Jakob Stoklund Olesen1-4/+4
The old naming scheme (load/use/def/store) can be traced back to an old linear scan article, but the names don't match how slots are actually used. The load and store slots are not needed after the deferred spill code insertion framework was deleted. The use and def slots don't make any sense because we are using half-open intervals as is customary in C code, but the names suggest closed intervals. In reality, these slots were used to distinguish early-clobber defs from normal defs. The new naming scheme also has 4 slots, but the names match how the slots are really used. This is a purely mechanical renaming, but some of the code makes a lot more sense now. llvm-svn: 144503
2011-08-09Move CalculateRegClass to MRI::recomputeRegClass.Jakob Stoklund Olesen1-1/+4
This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. llvm-svn: 137123
2011-07-05Fix PR10277.Jakob Stoklund Olesen1-0/+6
Remat during spilling triggers dead code elimination. If a phi-def becomes unused, that may also cause live ranges to split into separate connected components. This type of splitting is different from normal live range splitting. In particular, there may not be a common original interval. When the split range is its own original, make sure that the new siblings are also their own originals. The range being split cannot be used as an original since it doesn't cover the new siblings. llvm-svn: 134413
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