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path: root/llvm/lib/CodeGen/AllocationOrder.h
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2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
2017-11-10[RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.Jonas Paulsson1-0/+8
* The method getRegAllocationHints() is now of bool type instead of void. If true is returned, regalloc (AllocationOrder) will *only* try to allocate the hints, as opposed to merely trying them before non-hinted registers. * TargetRegisterInfo::getRegAllocationHints() is implemented for SystemZ with an increase in number of LOCRs. In this case, it is desired to force the hints even though there is a slight increase in spilling, because if a non-hinted register would be allocated, the LOCRMux pseudo would have to be expanded with a jump sequence. The LOCR (Load On Condition) SystemZ instruction must have both operands in either the low or high part of the 64 bit register. Reviewers: Quentin Colombet and Ulrich Weigand https://reviews.llvm.org/D36795 llvm-svn: 317879
2016-08-11Use the range variant of find instead of unpacking begin/endDavid Majnemer1-3/+2
If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278433
2015-07-15TargetRegisterInfo: Provide a way to check assigned registers in ↵Matthias Braun1-1/+3
getRegAllocationHints() Pass a const reference to LiveRegMatrix to getRegAllocationHints() because some targets can prodive better hints if they can test whether a physreg has been used for register allocation yet. llvm-svn: 242340
2015-07-01[CodeGen] Reduce visibility of implementation detailsBenjamin Kramer1-1/+1
NFC. llvm-svn: 241164
2014-08-13Canonicalize header guards into a common format.Benjamin Kramer1-2/+2
Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
2013-12-05Check hint registers for interference only once before evictionsAditya Nandakumar1-2/+4
llvm-svn: 196536
2013-09-11Revert "Give internal classes hidden visibility."Benjamin Kramer1-1/+1
It works with clang, but GCC has different rules so we can't make all of those hidden. This reverts commit r190534. llvm-svn: 190536
2013-09-11Give internal classes hidden visibility.Benjamin Kramer1-1/+1
Worth 100k on a linux/x86_64 Release+Asserts clang. llvm-svn: 190534
2013-01-12Limit the search space in RAGreedy::tryEvict().Jakob Stoklund Olesen1-0/+15
When tryEvict() is looking for a cheaper register in the allocation order, skip the tail of too expensive registers when possible. llvm-svn: 172281
2012-12-04Speed up the AllocationOrder class a bit.Jakob Stoklund Olesen1-5/+16
Allow the central functions to be inlined, and use the argumentless isHint() function when possible. llvm-svn: 169319
2012-12-04Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth1-1/+1
missed in the first pass because the script didn't yet handle include guards. Note that the script is now able to handle all of these headers without manual edits. =] llvm-svn: 169224
2012-12-03Use the new getRegAllocationHints() hook from AllocationOrder.Jakob Stoklund Olesen1-31/+16
This simplifies the hinting code quite a bit while making the targets easier to write at the same time. llvm-svn: 169173
2012-11-29Use MCPhysReg for RegisterClassInfo allocation orders.Jakob Stoklund Olesen1-3/+5
This saves a bit of memory. llvm-svn: 168852
2012-01-24Fix old doxygen comment.Jakob Stoklund Olesen1-2/+1
llvm-svn: 148825
2011-06-06Get allocation orders from RegisterClassInfo when possible.Jakob Stoklund Olesen1-1/+18
Only target-dependent hints require callbacks. The RCI allocation order has CSR aliases last according to their order of appearance in the getCalleeSavedRegs list. This can depend on the calling convention. This way, AllocationOrder::next doesn't have to check for reserved registers, and CSRs are always allocated last, even with weird calling conventions. llvm-svn: 132690
2011-06-03Switch AllocationOrder to using RegisterClassInfo instead of a BitVectorJakob Stoklund Olesen1-3/+3
of reserved registers. Use RegisterClassInfo in RABasic as well. This slightly changes som allocation orders because RegisterClassInfo puts CSR aliases last. llvm-svn: 132581
2011-02-25Try harder to get the hint by preferring to evict hint interference.Jakob Stoklund Olesen1-0/+2
llvm-svn: 126463
2010-12-10Add an AllocationOrder class that can iterate over the allocatable physicalJakob Stoklund Olesen1-0/+54
registers for a given virtual register. Reserved registers are filtered from the allocation order, and any valid hint is returned as the first suggestion. For target dependent hints, a number of arcane target hooks are invoked. llvm-svn: 121497