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2017-06-26[inline asm] dot operator while using imm generates wrong ir + asm - clang partMarina Yatsina1-0/+6
Inline asm dot operator while using imm generates wrong ir and asm This is the test for the llvm changes committed in revision 306300 This also fixes bugzilla 32987: https://bugs.llvm.org//show_bug.cgi?id=32987 The llvm part of the review that contains the test can be found here: https://reviews.llvm.org/D33039 commit on behald of zizhar Differential Revision: https://reviews.llvm.org/D33040 llvm-svn: 306301
2017-05-04[ms-inline-asm] Use the frontend size only for ambiguous instructionsReid Kleckner1-51/+88
This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-03-21[X86][MS-compatability][clang] allow MS TYPE/SIZE/LENGTH operators as a part ↵Coby Tayree1-0/+7
of a compound expression This patch introduces X86AsmParser with the ability to handle the aforementioned ops within compound "MS" arithmetical expressions. Currently - only supported as a stand alone Operand, e.g.: "TYPE X" now allowed : "4 + TYPE X * 128" LLVM side: https://reviews.llvm.org/D31173 Differential Revision: https://reviews.llvm.org/D31174 llvm-svn: 298426
2017-02-14MS inline asm: Filter MXCSR out of the inferred clobber listReid Kleckner1-0/+8
Since r295004, LLVM has started modelling this new register, but we don't have GCC constraint inline asm spellings for it yet. llvm-svn: 295107
2017-02-05[X86][MS]Adjacent comments within multi-line inline assembly statementCoby Tayree1-0/+6
Allowing adjacent comments within MS inline assembly multi-line statement Differential Revision: https://reviews.llvm.org/D28989 llvm-svn: 294120
2016-11-29Use ${:uid} to generate unique MS asm labels, not {:uid}Reid Kleckner1-7/+7
llvm-svn: 288093
2016-11-28[MS] Mangle a unique ID into all MS inline asm labelsReid Kleckner1-8/+10
This solves PR23715 in a way that is compatible with LTO. MSVC supports jumping to source-level labels and between inline asm blocks, but we don't. Also revert the old solution, r255201, which was to mark these calls as noduplicate. llvm-svn: 288059
2016-10-14[x86][ms-inline-asm] use of "jmp short" in asm is not supportedMichael Zuckerman1-0/+9
Test linked to: https://reviews.llvm.org/D24957 Committing in the name of Ziv Izhar: After check-all and LGTM . Differential Revision: https://reviews.llvm.org/D24958 llvm-svn: 284213
2016-09-02(clang part) Implement MASM-flavor intel syntax behavior for inline MS asm ↵Yunzhong Gao1-12/+12
block. Clang tests for verifying the following syntaxes: 1. 0xNN and NNh are accepted as valid hexadecimal numbers, but 0xNNh is not. 0xNN and NNh may come with optional U or L suffix. 2. NNb is accepted as a valid binary (base-2) number, but 0bNN is not. NNb may come with optional U or L suffix. Differential Revision: https://reviews.llvm.org/D22112 llvm-svn: 280556
2016-03-07[ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + ↵Marina Yatsina1-1/+1
fix bag with curly braces Until now curly braces could only be used in MS inline assembly to mark block start/end. All curly braces were removed completely at a very early stage. This approach caused bugs like: "m{o}v eax, ebx" turned into "mov eax, ebx" without any error. In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such. Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such). This patch fixes the bug described above and enables the use of AVX-512 special operands. This commit is the the clang part of the patch. The clang part of the review is: http://reviews.llvm.org/D17766 The llvm part of the review is: http://reviews.llvm.org/D17767 Differential Revision: http://reviews.llvm.org/D17766 llvm-svn: 262842
2016-02-23[ms-inline-asm] Fixing bug in single asm statement supportMarina Yatsina1-2/+11
Fixing a crash caused by trying to merge a single-line asm statement with an asm block that follows it, e.g: asm int 4 asm { int 5 } Now, only adjacent single-line asm statements that are not surrounded by braces will be merged into one asm call. Differential Revision: http://reviews.llvm.org/D17496 llvm-svn: 261618
2015-12-29[ms inline asm] Add support for label names with '$' charsMarina Yatsina1-0/+9
In MS inline asm syntax a label with '$' char produces an error, while in AT&T it does not. In AT&T inline asm syntax Clang escapes the '$' char and replaces it with "$$". Adopted same approach for MS syntax. Differential Revision: http://reviews.llvm.org/D15795 llvm-svn: 256545
2015-12-24[X86][ms-inline asm] Test case for adding support for memory operands that ↵Marina Yatsina1-0/+32
include structs Test case for commit 256381 Differential Revision: http://reviews.llvm.org/D15749 llvm-svn: 256382
2015-12-17[ms-inline-asm] Add support for composite structs in MS inline asmMarina Yatsina1-0/+20
Add MS inline asm support for structs that contain fields that are also structs. Differential Revision: http://reviews.llvm.org/D15578 llvm-svn: 255890
2015-12-10Mark MS inline ASM 'nodplicate' it it has labels (PR23715)Hans Wennborg1-2/+5
Duplicating it can lead to labels being defined twice. Differential revision: http://reviews.llvm.org/D15399 llvm-svn: 255201
2015-08-26[ms-inline-asm] Add field access to MS inline asm identifier lookupReid Kleckner1-0/+18
Now we can parse code like this: struct A { int field; }; int f(A o) { __asm mov eax, o.field } Fixes PR19117. llvm-svn: 246088
2015-07-30[X86] Recognize "flags" as an identifier, not a register in Intel-syntax ↵Michael Kuperstein1-0/+8
inline asm This contains the test-case for r243630. Patch by: marina.yatsina@intel.com Differential Revision: http://reviews.llvm.org/D11513 llvm-svn: 243632
2015-06-14Add test for parsing the XOR operator in Intel syntax inline assembly.Michael Kuperstein1-0/+2
LLVM side of the patch was committed as r239695. Differential Revision: http://reviews.llvm.org/D10384 Patch by marina.yatsina@intel.com llvm-svn: 239696
2015-02-27Update Clang tests to handle explicitly typed load changes in LLVM.David Blaikie1-1/+1
llvm-svn: 230795
2014-09-22ms-inline-asm: Add a test case for the usage of labels in bracket expressionsEhsan Akhgari1-0/+9
Summary: This is a test for this patch: http://reviews.llvm.org/D5445. Reviewers: rnk Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D5446 llvm-svn: 218271
2014-09-22ms-inline-asm: Scope inline asm labels to functionsEhsan Akhgari1-1/+28
Summary: This fixes PR20023. In order to implement this scoping rule, we piggy back on the existing LabelDecl machinery, by creating LabelDecl's that will carry the "internal" name of the inline assembly label, which we will rewrite the asm label to. Reviewers: rnk Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D4589 llvm-svn: 218230
2014-09-04MS inline asm: Allow __asm blocks to set a return valueReid Kleckner1-5/+6
If control falls off the end of a function after an __asm block, MSVC assumes that the inline assembly filled the EAX and possibly EDX registers with an appropriate return value. This functionality is used in inline functions returning 64-bit integers in system headers, so we need some amount of compatibility. This is implemented in Clang by adding extra output constraints to every inline asm block, and storing the resulting output registers into the return value slot. If we see an asm block somewhere in the function body, we emit a normal epilogue instead of marking the end of the function with a return type unreachable. Normal returns in functions not using this functionality will overwrite the return value slot, and in most cases LLVM should be able to eliminate the dead stores. Fixes PR17201. Reviewed By: majnemer Differential Revision: http://reviews.llvm.org/D5177 llvm-svn: 217187
2014-09-04MS inline asm: Add a test for xgetbv clobbersReid Kleckner1-0/+6
llvm-svn: 217174
2014-08-01MS inline asm: Tests for r214550Reid Kleckner1-2/+2
These tests seem like an exception to the rule against assembly emitting tests in clang. I made an LLVM side change that can only be tested by setting up the inline assembly machinery that is only implemented by Clang. llvm-svn: 214552
2014-07-31ms-inline-asm: Add a test to ensure that call doesn't clobber eax.Ehsan Akhgari1-0/+6
Note that it's not clear whether this is the right behavior, please see the review for the discussion. Reviewers: rnk Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D4577 llvm-svn: 214401
2014-07-25Fix test/CodeGen/ms-inline-asm.c from r213916.Ehsan Akhgari1-1/+1
llvm-svn: 213919
2014-07-25clang-cl: Merge adjacent single-line __asm blocksEhsan Akhgari1-125/+135
Summary: This patch extends the __asm parser to make it keep parsing input tokens as inline assembly if a single-line __asm line is followed by another line starting with __asm too. It also makes sure that we correctly keep matching braces in such situations by separating the notions of how many braces we are matching and whether we are in single-line asm block mode. Reviewers: rnk Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D4598 llvm-svn: 213916
2014-07-17clang/test/CodeGen/ms-inline-asm.c: Fix for -Asserts.NAKAMURA Takumi1-7/+9
llvm-svn: 213329
2014-07-17Add a test for PR20343 after llvm r213303.Nico Weber1-0/+16
llvm-svn: 213305
2014-07-06Add support for nested blocks in Microsoft inline assemblyEhsan Akhgari1-3/+8
This fixes http://llvm.org/PR20204. llvm-svn: 212389
2014-07-05Add a test case for the tilde operator in Microsoft inline assemblyEhsan Akhgari1-0/+2
llvm-svn: 212373
2014-03-27MS asm: Filter out fpsw clobbersReid Kleckner1-0/+9
When parsing MS inline assembly, we note that fpsw is an implicit def of most x87 FP operations, and add it to the clobber list. However, we don't recognize fpsw as a gcc register name, and we assert. Clang always adds an fpsr clobber, which means the same thing to LLVM, so we can just use that. This test case was broken by my LLVM change r196939. Reviewers: echristo Differential Revision: http://llvm-reviews.chandlerc.com/D2993 llvm-svn: 204878
2014-03-06Add tests for MS inline asm change r203146Reid Kleckner1-0/+15
llvm-svn: 203147
2014-01-28Test case for clobbers on cpuid in ms inline asmReid Kleckner1-0/+6
Tests r200279 in LLVM. llvm-svn: 200280
2013-12-10Update clang MS inline asm tests for r196939Reid Kleckner1-7/+8
llvm-svn: 196940
2013-12-04clang/test: REQUIRES: s/x86-64-registered-target/x86-registered-target/NAKAMURA Takumi1-1/+1
llvm-svn: 196350
2013-09-04Don't pass -O0 to clang_cc1, it is the default.Rafael Espindola1-1/+1
llvm-svn: 189910
2013-04-18Fix typo.Chad Rosier1-1/+1
llvm-svn: 179811
2013-04-17Test cases for r179719.Chad Rosier1-0/+6
llvm-svn: 179720
2013-04-17Test cases for r179655.Chad Rosier1-3/+36
llvm-svn: 179656
2013-04-12Add test case for r179403.Chad Rosier1-0/+12
llvm-svn: 179404
2013-04-12Add test case for r179399.Chad Rosier1-1/+3
llvm-svn: 179400
2013-04-12Add test case for r179383 and r179393.Chad Rosier1-1/+8
llvm-svn: 179394
2013-04-10[ms-inline asm] Move a few test cases from the 32-bit version to the 64-bitChad Rosier1-30/+0
version as lea is only available in 64-bit mode. llvm-svn: 179190
2013-04-10[ms-inline asm] Add a few test cases that were regressed by r179115. ThatChad Rosier1-0/+3
commit was reverted in r179120, but I do plan on reapplying with a fix shortly. Part of rdar://13611297 llvm-svn: 179182
2013-04-08Test case for r179030.Chad Rosier1-0/+7
llvm-svn: 179031
2013-04-05Add test case for r178881.Chad Rosier1-1/+9
llvm-svn: 178882
2013-03-27Remove unnecessary attributes from test case.Chad Rosier1-81/+79
llvm-svn: 178188
2013-03-27Add a front-end test case for r178186.Chad Rosier1-0/+8
llvm-svn: 178187
2013-03-19Test case for r177439 and r177440.Chad Rosier1-0/+13
llvm-svn: 177441
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