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2020-05-21Add nomerge function attribute to clangZequan Wu1-0/+3
2020-05-19[CGCall] Annotate references with "align" attribute.Eli Friedman1-7/+0
If we're going to assume references are dereferenceable, we should also assume they're aligned: otherwise, we can't actually dereference them. See also D80072. Differential Revision: https://reviews.llvm.org/D80166
2020-05-12[SveEmitter] Add builtins for svdup and svindexSander de Smalen1-0/+1
Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D79357
2020-05-11[SveEmitter] Add builtins for svmovlb and svmovltSander de Smalen1-0/+3
These builtins are expanded in CGBuiltin to use intrinsics for (signed/unsigned) shift left long top/bottom. Reviewers: efriedma, SjoerdMeijer Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D79579
2020-05-07[SveEmitter] Add builtins for SVE2 Polynomial arithmeticSander de Smalen1-0/+4
This patch adds builtins for: - sveorbt - sveortb - svpmul - svpmullb, svpmullb_pair - svpmullt, svpmullt_pair The svpmullb and svpmullt builtins are expressed using the svpmullb_pair and svpmullt_pair LLVM IR intrinsics, respectively. Reviewers: SjoerdMeijer, efriedma, rengolin Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D79480
2020-05-05[clang][codegen] Refactor argument loading in function prolog. NFC.Michael Liao1-1/+1
Summary: - Skip copying function arguments and unnecessary casting by using them directly. Reviewers: rjmccall, kerbowa, yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D79394
2020-05-05Reland D78750: [SveEmitter] Add builtins for svdupq and svdupq_laneSander de Smalen1-0/+1
Edit: Changed a few CHECK lines into CHECK-DAG lines. This reverts commit 90f3f62cb087782fe2608e95d686c29067281b6e.
2020-05-04Revert "[SveEmitter] Add builtins for svdupq and svdupq_lane"Sander de Smalen1-1/+0
It seems this patch broke some buildbots, so reverting until I have had a chance to investigate. This reverts commit 6b90a6887d25e3375bb916a3ed09f7ccec819d0c.
2020-05-04[SveEmitter] Add builtins for svdupq and svdupq_laneSander de Smalen1-0/+1
* svdupq builtins that duplicate scalars to every quadword of a vector are defined using builtins for svld1rq (load and replicate quadword). * svdupq builtins that duplicate boolean values to fill a predicate vector are defined using `svcmpne`. Reviewers: SjoerdMeijer, efriedma, ctetreau Reviewed By: efriedma Tags: #clang Differential Revision: https://reviews.llvm.org/D78750
2020-05-04Reapply "Add support for #pragma float_control" with buildbot fixesMelanie Blower1-0/+5
Add support for #pragma float_control Reviewers: rjmccall, erichkeane, sepavloff Differential Revision: https://reviews.llvm.org/D72841 This reverts commit fce82c0ed310174fe48e2402ac731b6340098389.
2020-05-01Revert "Reapply "Add support for #pragma float_control" with improvements to"Melanie Blower1-5/+0
This reverts commit 69aacaf699922ffe0450f567e21208c10c84731f.
2020-05-01Reapply "Add support for #pragma float_control" with improvements toMelanie Blower1-0/+5
test cases Add support for #pragma float_control Reviewers: rjmccall, erichkeane, sepavloff Differential Revision: https://reviews.llvm.org/D72841 This reverts commit 85dc033caccaa6ab919d57f9759290be41240146, and makes corrections to the test cases that failed on buildbots.
2020-05-01Revert "Add support for #pragma float_control"Melanie Blower1-5/+0
This reverts commit 4f1e9a17e9d28bdfd035313c96b3a5d4c91a7733. due to fail on buildbot, sorry for the noise
2020-05-01Add support for #pragma float_controlMelanie Blower1-0/+5
Reviewers: rjmccall, erichkeane, sepavloff Differential Revision: https://reviews.llvm.org/D72841
2020-04-29[SveEmitter] Add builtins for gather prefetchesSander de Smalen1-0/+3
Patch by Andrzej Warzynski Reviewed By: efriedma Tags: #clang Differential Revision: https://reviews.llvm.org/D78677
2020-04-28[SVE] Update EmitSVEPredicateCast to take a ScalableVectorTypeChristopher Tetreault1-1/+2
Summary: Removes usage of VectorType::getNumElements identified by test located at CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c. Since the type is an SVE predicate vector, it makes sense to specialize the code for scalable vectors only. Reviewers: rengolin, efriedma Reviewed By: efriedma Subscribers: tschuett, kristof.beyls, rkruppe, psnobl, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D78958
2020-04-28[CMSE] Clear padding bits of struct/unions/fp16 passed by valueMomchil Velikov1-0/+5
When passing a value of a struct/union type from secure to non-secure state (that is returning from a CMSE entry function or passing an argument to CMSE-non-secure call), there is a potential sensitive information leak via the padding bits in the structure. It is not possible in the general case to ensure those bits are cleared by using Standard C/C++. This patch makes the compiler emit code to clear such padding bits. Since type information is lost in LLVM IR, the code generation is done by Clang. For each interesting record type, we build a bitmask, in which all the bits, corresponding to user declared members, are set. Values of record types are returned by coercing them to an integer. After the coercion, the coerced value is masked (with bitwise AND) and then returned by the function. In a similar manner, values of record types are passed as arguments by coercing them to an array of integers, and the coerced values themselves are masked. For union types, we effectively clear only bits, which aren't part of any member, since we don't know which is the currently active one. The compiler will issue a warning, whenever a union is passed to non-secure state. Values of half-precision floating-point types are passed in the least significant bits of a 32-bit register (GPR or FPR) with the most significant bits unspecified. Since this is also a potential leak of sensitive information, this patch also clears those unspecified bits. Differential Revision: https://reviews.llvm.org/D76369
2020-04-27[SVE][NFC] Use ScalableVectorType in CGBuiltinChristopher Tetreault1-2/+2
Summary: * Upgrade some usages of VectorType to use ScalableVectorType Reviewers: efriedma, david-arm, fpetrogalli, kmclaughlin Reviewed By: efriedma Subscribers: tschuett, rkruppe, psnobl, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D78842
2020-04-24[SveEmitter] Add builtins for contiguous prefetchesSander de Smalen1-0/+3
This patch also adds the enum `sv_prfop` for the prefetch operation specifier and checks to ensure the passed enum values are valid. Reviewers: SjoerdMeijer, efriedma, ctetreau Reviewed By: efriedma Tags: #clang Differential Revision: https://reviews.llvm.org/D78674
2020-04-22[SveEmitter] Add builtins for svwhilerw/svwhilewrSander de Smalen1-0/+1
This also adds the IsOverloadWhileRW flag which tells CGBuiltin to use the result predicate type and the first pointer type as the overloaded types for the LLVM IR intrinsic. Reviewers: SjoerdMeijer, efriedma Reviewed By: efriedma Tags: #clang Differential Revision: https://reviews.llvm.org/D78238
2020-04-22[SveEmitter] Add IsOverloadNone flag and builtins for svpfalse and ↵Sander de Smalen1-0/+2
svcnt[bhwd]_pat Add the IsOverloadNone flag to tell CGBuiltin that it does not have an overloaded type. This is used for e.g. svpfalse which does not take any arguments and always returns a svbool_t. This patch also adds builtins for svcntb_pat, svcnth_pat, svcntw_pat and svcntd_pat, as those don't require custom codegen. Reviewers: SjoerdMeijer, efriedma, rovka Reviewed By: efriedma Tags: #clang Differential Revision: https://reviews.llvm.org/D77596
2020-04-22[SveEmitter] Add support for _n form builtinsSander de Smalen1-1/+1
The ACLE has builtins that take a scalar value that is to be expanded into a vector by the operation. While the ISA may have an instruction that takes an immediate or a scalar to represent this, the LLVM IR intrinsic may not, so Clang will have to splat the scalar value. This patch also adds the _n forms for svabd, svadd, svdiv, svdivr, svmax, svmin, svmul, svmulh, svub and svsubr. Reviewers: SjoerdMeijer, efriedma, rovka Reviewed By: SjoerdMeijer Tags: #clang Differential Revision: https://reviews.llvm.org/D77594
2020-04-22[SveEmitter] Implement builtins for gathers/scattersAndrzej Warzynski1-1/+13
This patch adds builtins for: * regular, first-faulting and non-temporal gather loads * regular and non-temporal scatter stores Differential Revision: https://reviews.llvm.org/D77735
2020-04-14[SveEmitter] Add range checks for immediates and predicate patterns.Sander de Smalen1-0/+2
Summary: This patch adds a mechanism to easily add range checks for a builtin's immediate operands. This patch is tested with the qdech intrinsic, which takes both an enum for the predicate pattern, as well as an immediate for the multiplier. Reviewers: efriedma, SjoerdMeijer, rovka Reviewed By: efriedma, SjoerdMeijer Subscribers: mgorny, tschuett, mgrang, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D76678
2020-04-14[SveEmitter] Implement builtins for contiguous loads/storesSander de Smalen1-2/+6
This adds builtins for all contiguous loads/stores, including non-temporal, first-faulting and non-faulting. Reviewers: efriedma, SjoerdMeijer Reviewed By: SjoerdMeijer Tags: #clang Differential Revision: https://reviews.llvm.org/D76238
2020-03-19[ARM] Enabling range checks on Neon intrinsics' lane argumentsLucas Prates1-0/+2
Summary: Range checks were not properly performed in the lane arguments of Neon intrinsics implemented based on splat operations. Calls to those intrinsics where translated to `__builtin__shufflevector` calls directly by the pre-processor through the arm_neon.h macros, missing the chance for the proper range checks. This patch enables the range check by introducing an auxiliary splat instruction in arm_neon.td, delaying the translation to shufflevector calls to CGBuiltin.cpp in clang after the checks were performed. Reviewers: jmolloy, t.p.northover, rsmith, olista01, ostannard Reviewed By: ostannard Subscribers: ostannard, dnsampaio, danielkiss, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D74619
2020-03-19Revert "[ARM] Setting missing isLaneQ attribute on Neon Intrisics definitions"Lucas Prates1-2/+0
This reverts commit 62ab15ffa3f910c36758e99324deac12ee006c90. Multiple commits were unintentionally squashed into this one. Reverting so each of them can be pushed properly.
2020-03-19[ARM] Setting missing isLaneQ attribute on Neon Intrisics definitionsLucas Prates1-0/+2
Summary: Some of the `*_laneq` intrinsics defined in arm_neon.td were missing the setting of the `isLaneQ` attribute. This patch sets the attribute on the related definitions, as they will be required to properly perform range checks on their lane arguments. Reviewers: jmolloy, t.p.northover, rsmith, olista01, dnsampaio Reviewed By: dnsampaio Subscribers: dnsampaio, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D74616
2020-03-18Reland D75470 [SVE] Auto-generate builtins and header for svld1.Sander de Smalen1-0/+1
Reworked the patch to avoid sharing a header (SVETypeFlags.h) between include/clang/Basic and utils/TableGen/SveEmitter.cpp. Now the patch generates the enum/flags which is included in TargetBuiltins.h. Also renamed one of the SveEmitter options to be in line with MVE. Summary: This is a first patch in a series for the SveEmitter to generate the arm_sve.h header file and builtins. I've tried my best to strip down this patch as best as I could, but there are still a few changes that are not necessarily exercised by the load intrinsics in this patch, mostly around the SVEType class which has some common logic to represent types from a type and prototype string. I thought it didn't make much sense to remove that from this patch and split it up.
2020-03-16Revert "[SVE] Auto-generate builtins and header for svld1."Sander de Smalen1-1/+0
This reverts commit 8b409eabaf755c88a7d652fe99d3ad858a4fe82a. Reverting this patch for now because it breaks some buildbots.
2020-03-16[SVE] Auto-generate builtins and header for svld1.Sander de Smalen1-0/+1
This is a first patch in a series for the SveEmitter to generate the arm_sve.h header file and builtins. I've tried my best to strip down this patch as best as I could, but there are still a few changes that are not necessarily exercised by the load intrinsics in this patch, mostly around the SVEType class which has some common logic to represent types from a type and prototype string. I thought it didn't make much sense to remove that from this patch and split it up. Reviewers: efriedma, rovka, SjoerdMeijer, rsandifo-arm, rengolin Reviewed By: SjoerdMeijer Tags: #clang Differential Revision: https://reviews.llvm.org/D75470
2020-03-15[Clang][SVE] Parse builtin type string for scalable vectorsSander de Smalen1-0/+5
This patch adds 'q' to mean 'scalable vector' in the builtin type string, and for SVE will return the matching builtin type as defined in the C/C++ language extensions for SVE. This patch also adds some scaffolding to generate the arm_sve.h header file, and some builtin definitions (+CodeGen) to be able to implement some simple masked load intrinsics that use the ACLE types, such as: svint8_t test_svld1_s8(svbool_t pg, const int8_t *base) { return svld1_s8(pg, base); } Reviewers: efriedma, rjmccall, rovka, rsandifo-arm, rengolin Reviewed By: efriedma Tags: #clang Differential Revision: https://reviews.llvm.org/D75298
2020-03-10[ARM,CDE] Generalize MVE intrinsics infrastructure to support CDEMikhail Maltsev1-0/+3
Summary: This patch generalizes the existing code to support CDE intrinsics which will share some properties with existing MVE intrinsics (some of the intrinsics will be polymorphic and accept/return values of MVE vector types). Specifically the patch: * Adds new tablegen backends -gen-arm-cde-builtin-def, -gen-arm-cde-builtin-codegen, -gen-arm-cde-builtin-sema, -gen-arm-cde-builtin-aliases, -gen-arm-cde-builtin-header based on existing MVE backends. * Renames the '__clang_arm_mve_alias' attribute into '__clang_arm_builtin_alias' (it will be used with CDE intrinsics as well as MVE intrinsics) * Implements semantic checks for the coprocessor argument of the CDE intrinsics as well as the existing coprocessor intrinsics. * Adds one CDE intrinsic __arm_cx1 to test the above changes Reviewers: simon_tatham, MarkMurrayARM, ostannard, dmgreen Reviewed By: simon_tatham Subscribers: sdesmalen, mgorny, kristof.beyls, danielkiss, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D75850
2020-03-02[OPENMP50]Add basic support for depobj construct.Alexey Bataev1-0/+1
Added basic parsing/sema/serialization support for depobj directive.
2020-02-28[ubsan] Add support for -fsanitize=nullability-* suppressionsVedant Kumar1-1/+2
rdar://59402904
2020-02-19[OpenMP][OMPIRBuilder] Introducing the `OMPBuilderCBHelpers` helper classFady Ghanim1-0/+109
This patch introduces a new helper class `OMPBuilderCBHelpers`, which will contain all reusable C/C++ language specific function- alities required by the `OMPIRBuilder`. Initially, this helper class contains the body and finalization codegen functionalities implemented using callbacks which were moved here for reusability among the different directives implemented in the `OMPIRBuilder`, along with RAIIs for preserving state prior to emitting outlined and/or inlined OpenMP regions. In the future this helper class will also contain all the different call backs required by OpenMP clauses/variable privatization. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D74562
2020-02-13[AsmPrinter] De-capitalize all AsmPrinter::Emit* but EmitInstructionFangrui Song1-4/+5
Similar to rL328848.
2020-02-10[clang][codegen] Fix another lifetime emission on alloca on non-default ↵Michael Liao1-2/+3
address space. - Lifetime intrinsics expect the pointer directly from alloca. Need extra handling for targets with alloca on non-default (or non-zero) address space.
2020-01-27[Alignment][NFC] Use Align with CreateAlignedLoadGuillaume Chatelet1-1/+1
Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet, bollu Subscribers: hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D73449
2020-01-21Revert "[ARM] Follow AACPS standard for volatile bit-fields access width"Diogo Sampaio1-7/+1
This reverts commit 6a24339a45246b66bd3de88cc9c6a5b5e77c0645. Submitted using ide button by mistake
2020-01-21[ARM] Follow AACPS standard for volatile bit-fields access widthDiogo Sampaio1-1/+7
Summary: This patch resumes the work of D16586. According to the AAPCS, volatile bit-fields should be accessed using containers of the widht of their declarative type. In such case: ``` struct S1 { short a : 1; } ``` should be accessed using load and stores of the width (sizeof(short)), where now the compiler does only load the minimum required width (char in this case). However, as discussed in D16586, that could overwrite non-volatile bit-fields, which conflicted with C and C++ object models by creating data race conditions that are not part of the bit-field, e.g. ``` struct S2 { short a; int b : 16; } ``` Accessing `S2.b` would also access `S2.a`. The AAPCS Release 2019Q1.1 (https://static.docs.arm.com/ihi0042/g/aapcs32.pdf) section 8.1 Data Types, page 35, "Volatile bit-fields - preserving number and width of container accesses" has been updated to avoid conflict with the C++ Memory Model. Now it reads in the note: ``` This ABI does not place any restrictions on the access widths of bit-fields where the container overlaps with a non-bit-field member. This is because the C/C++ memory model defines these as being separate memory locations, which can be accessed by two threads simultaneously. For this reason, compilers must be permitted to use a narrower memory access width (including splitting the access into multiple instructions) to avoid writing to a different memory location. ``` I've updated the patch D16586 to follow such behavior by verifying that we only change volatile bit-field access when: - it won't overlap with any other non-bit-field member - we only access memory inside the bounds of the record Regarding the number of memory accesses, that should be preserved, that will be implemented by D67399. Reviewers: rsmith, rjmccall, eli.friedman, ostannard Subscribers: ostannard, kristof.beyls, cfe-commits, carwil, olista01 Tags: #clang Differential Revision: https://reviews.llvm.org/D72932
2020-01-17[OPENMP]Improve debug locations in OpenMP regions.Alexey Bataev1-1/+2
Emit more precise debug locations for the OpenMP outlined regions.
2020-01-16[HIP][AMDGPU] expand printf when compiling HIP to AMDGPUSameer Sahasrabuddhe1-0/+2
Summary: This change implements the expansion in two parts: - Add a utility function emitAMDGPUPrintfCall() in LLVM. - Invoke the above function from Clang CodeGen, when processing a HIP program for the AMDGPU target. The printf expansion has undefined behaviour if the format string is not a compile-time constant. As a sufficient condition, the HIP ToolChain now emits -Werror=format-nonliteral. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D71365
2020-01-09Add builtins for aligning and checking alignment of pointers and integersAlex Richardson1-0/+5
This change introduces three new builtins (which work on both pointers and integers) that can be used instead of common bitwise arithmetic: __builtin_align_up(x, alignment), __builtin_align_down(x, alignment) and __builtin_is_aligned(x, alignment). I originally added these builtins to the CHERI fork of LLVM a few years ago to handle the slightly different C semantics that we use for CHERI [1]. Until recently these builtins (or sequences of other builtins) were required to generate correct code. I have since made changes to the default C semantics so that they are no longer strictly necessary (but using them does generate slightly more efficient code). However, based on our experience using them in various projects over the past few years, I believe that adding these builtins to clang would be useful. These builtins have the following benefit over bit-manipulation and casts via uintptr_t: - The named builtins clearly convey the semantics of the operation. While checking alignment using __builtin_is_aligned(x, 16) versus ((x & 15) == 0) is probably not a huge win in readably, I personally find __builtin_align_up(x, N) a lot easier to read than (x+(N-1))&~(N-1). - They preserve the type of the argument (including const qualifiers). When using casts via uintptr_t, it is easy to cast to the wrong type or strip qualifiers such as const. - If the alignment argument is a constant value, clang can check that it is a power-of-two and within the range of the type. Since the semantics of these builtins is well defined compared to arbitrary bit-manipulation, it is possible to add a UBSAN checker that the run-time value is a valid power-of-two. I intend to add this as a follow-up to this change. - The builtins avoids int-to-pointer casts both in C and LLVM IR. In the future (i.e. once most optimizations handle it), we could use the new llvm.ptrmask intrinsic to avoid the ptrtoint instruction that would normally be generated. - They can be used to round up/down to the next aligned value for both integers and pointers without requiring two separate macros. - In many projects the alignment operations are already wrapped in macros (e.g. roundup2 and rounddown2 in FreeBSD), so by replacing the macro implementation with a builtin call, we get improved diagnostics for many call-sites while only having to change a few lines. - Finally, the builtins also emit assume_aligned metadata when used on pointers. This can improve code generation compared to the uintptr_t casts. [1] In our CHERI compiler we have compilation mode where all pointers are implemented as capabilities (essentially unforgeable 128-bit fat pointers). In our original model, casts from uintptr_t (which is a 128-bit capability) to an integer value returned the "offset" of the capability (i.e. the difference between the virtual address and the base of the allocation). This causes problems for cases such as checking the alignment: for example, the expression `if ((uintptr_t)ptr & 63) == 0` is generally used to check if the pointer is aligned to a multiple of 64 bytes. The problem with offsets is that any pointer to the beginning of an allocation will have an offset of zero, so this check always succeeds in that case (even if the address is not correctly aligned). The same issues also exist when aligning up or down. Using the alignment builtins ensures that the address is used instead of the offset. While I have since changed the default C semantics to return the address instead of the offset when casting, this offset compilation mode can still be used by passing a command-line flag. Reviewers: rsmith, aaron.ballman, theraven, fhahn, lebedev.ri, nlopes, aqjune Reviewed By: aaron.ballman, lebedev.ri Differential Revision: https://reviews.llvm.org/D71499
2019-12-10[OpenMP][NFCI] Introduce llvm/IR/OpenMPConstants.hJohannes Doerfert1-1/+1
Summary: The new OpenMPConstants.h is a location for all OpenMP related constants (and helpers) to live. This patch moves the directives there (the enum OpenMPDirectiveKind) and rewires Clang to use the new location. Initially part of D69785. Reviewers: kiranchandramohan, ABataev, RaviNarayanaswamy, gtbercea, grokos, sdmitriev, JonChesterfield, hfinkel, fghanim Subscribers: jholewinski, ppenzin, penzn, llvm-commits, cfe-commits, jfb, guansong, bollu, hiraditya, mgorny Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D69853
2019-12-09Avoid Attr.h includes, CodeGen editionReid Kleckner1-5/+2
This saves around 20 includes of Attr.h. Not much.
2019-12-05[OpenMP50] Add parallel master constructcchen1-0/+1
Reviewers: ABataev, jdoerfert Reviewed By: ABataev Subscribers: rnk, jholewinski, guansong, arphaman, jfb, cfe-commits, sandoval, dreachem Tags: #clang Differential Revision: https://reviews.llvm.org/D70726
2019-12-05 Reapply af57dbf12e54 "Add support for options -frounding-math, ↵Melanie Blower1-0/+3
ftrapping-math, -ffp-model=, and -ffp-exception-behavior=" Patch was reverted because https://bugs.llvm.org/show_bug.cgi?id=44048 The original patch is modified to set the strictfp IR attribute explicitly in CodeGen instead of as a side effect of IRBuilder. In the 2nd attempt to reapply there was a windows lit test fail, the tests were fixed to use wildcard matching. Differential Revision: https://reviews.llvm.org/D62731
2019-12-04Revert "[OpenMP50] Add parallel master construct, by Chi Chun Chen."Reid Kleckner1-1/+0
This reverts commit 713dab21e27c987b9114547ce7136bac2e775de9. Tests do not pass on Windows.
2019-12-04Revert " Reapply af57dbf12e54 "Add support for options ↵Melanie Blower1-3/+0
-frounding-math, ftrapping-math, -ffp-model=, and -ffp-exception-behavior="" This reverts commit cdbed2dd856c14687efd741c2d8321686102acb8. Build break on Windows (lit fail)
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