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2016-09-12[asan] Cleanup: Move tid into ErrorBase, add const to BufferedStackTrace, be ↵Filipe Cabecinhas4-28/+27
consistent in constructor arguments and member order. Summary: As mentioned in D24394, I'm moving tid to ErrorBase, since basically all errors need it. Also mentioned in the same review are other cleanups like adding const to BufferedStackTrace and make sure constructor orders are consistent. Reviewers: vitalybuka, kcc, eugenis Subscribers: llvm-commits, kubabrecka Differential Revision: https://reviews.llvm.org/D24455 llvm-svn: 281236
2016-09-12Store the size of the outermost dimension in case of newly created arrays ↵Roman Gareev13-50/+76
that require memory allocation. We do not need the size of the outermost dimension in most cases, but if we allocate memory for newly created arrays, that size is needed. Reviewed-by: Michael Kruse <llvm@meinersbur.de> Differential Revision: https://reviews.llvm.org/D23991 llvm-svn: 281234
2016-09-12llvm-size: Add --totals optionHemant Kulkarni2-3/+41
Differential Revision: https://reviews.llvm.org/D24308 llvm-svn: 281233
2016-09-12llvm-objdump: Add --start-address and --stop-address optionsHemant Kulkarni3-4/+143
Differential Revision: https://reviews.llvm.org/D24160 llvm-svn: 281232
2016-09-12[InstCombine] use m_APInt to allow icmp X, C folds for splat constant vectorsSanjay Patel3-7/+6
isSignBitCheck could be changed to take a pointer param to avoid the 'UnusedBit' ugliness. llvm-svn: 281231
2016-09-12AMDGPU: Do not clobber SCC in SIWholeQuadModeNicolai Haehnle3-75/+247
Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D22198 llvm-svn: 281230
2016-09-12[GlobalISel] Fix mismatched "<..)" in intrinsic MO printing. NFC.Ahmed Bougacha1-2/+2
llvm-svn: 281229
2016-09-12Revert "[ARM] Promote small global constants to constant pools"James Molloy5-222/+1
This reverts commit r281213. It made a bot go bang: http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/14625 llvm-svn: 281228
2016-09-12Trivial documentation fix regarding Obj-C ARC ↵Jonathan Roelofs1-2/+2
objc_arc_weak_reference_unavailable Fixed incorrect docs that referred to: objc_arc_weak_unavailable when it should be: objc_arc_weak_reference_unavailable Patch by: Sean McBride! llvm-svn: 281227
2016-09-12Move StdStringExtractor to tools/debugserverPavel Labath6-7/+4
The class is only used in the debugserver. The rest of lldb has the StringExtractor class. Xcode project will need to be updated after this. llvm-svn: 281226
2016-09-12[SE] RegisteredHostMemory for async device copiesJason Henline11-302/+393
Summary: Improve the error-prone interface that allows users to pass host pointers that haven't been registered to asynchronous copy methods. In CUDA, this is an extremely easy error to make, and instead of failing at runtime, it succeeds and gives the right answers by turning the async copy into a sync copy. So, you silently get a huge performance degradation if you misuse the old interface. This new interface should prevent that. Reviewers: jlebar Subscribers: jprice, beanz, parallel_libs-commits Differential Revision: https://reviews.llvm.org/D24353 llvm-svn: 281225
2016-09-12[BranchFolding] Unique added live-ins after hoisting code.Ahmed Bougacha2-1/+8
We're not supposed to have duplicate live-ins. llvm-svn: 281224
2016-09-12[X86] Copy imp-uses when folding tailcall into conditional branch.Ahmed Bougacha2-1/+85
r280832 added 32-bit support for emitting conditional tail-calls, but dropped imp-used parameter registers. This went unnoticed until r281113, which added 64-bit support, as this is only exposed with parameter passing via registers. Don't drop the imp-used parameters. llvm-svn: 281223
2016-09-12Simplify handling of /DISCARD/. NFC.Rafael Espindola2-11/+8
llvm-svn: 281222
2016-09-12[FunctionAttrs] Don't try to infer returned if it is already on an argumentDavid Majnemer2-0/+17
Trying to infer the 'returned' attribute if an argument is already 'returned' can lead to verification failure: inference might determine that a different argument is passed through which would result in two different arguments marked as 'returned'. This fixes PR30350. llvm-svn: 281221
2016-09-12fix formatting; NFCSanjay Patel1-14/+13
llvm-svn: 281220
2016-09-12[InstCombine] add tests to show missing vector foldsSanjay Patel2-1/+29
llvm-svn: 281219
2016-09-12add select i1 test, reproduser pr30249.Igor Breger1-0/+12
llvm-svn: 281218
2016-09-12[InstCombine] add helper function for foldICmpUsingKnownBits; NFCISanjay Patel2-259/+279
llvm-svn: 281217
2016-09-12[AMDGPU] Assembler: Move disabled SDWA and DPP instruction into Disable asm ↵Sam Kolton2-0/+12
variant Summary: This removes disabled instructions from match tables so we will not match them at all. Reviewers: tstellarAMD, vpykhtin, artem.tamazov Subscribers: wdng, nhaehnle, arsenm Differential Revision: https://reviews.llvm.org/D24452 llvm-svn: 281216
2016-09-12[Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy9-26/+232
For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)). 1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS. 2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS. 3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS). 4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask. 1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win. llvm-svn: 281215
2016-09-12fix formatting/typos; NFCSanjay Patel2-12/+11
llvm-svn: 281214
2016-09-12[ARM] Promote small global constants to constant poolsJames Molloy5-1/+222
If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). llvm-svn: 281213
2016-09-12[LoopInterchange] Improve debug output. NFC.Chad Rosier1-2/+2
llvm-svn: 281212
2016-09-12Fix the Thumb test for vfloat intrinsicsPablo Barrio1-55/+56
Summary: This test was not testing the intrinsics. A function like this: define %v4f32 @test_v4f32.floor(%v4f32 %a){ ... %1 = call %v4f32 @llvm.floor.v4f32(%v4f32 %a) ... } is transformed into the following assembly: _test_v4f32.floor: @ @test_v4f32.floor ... bl _floorf ... In each function tested, there are two CHECK: one that checked for the label and another one for the intrinsic that should be used inside the function (in our case, "floor"). However, although the first CHECK was matching the label, the second was not matching the intrinsic, but the second "floor" in the same line as the label. This is fixed by making the first CHECK match the entire line. Reviewers: jmolloy, rengolin Subscribers: rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D24398 llvm-svn: 281211
2016-09-12Store an ArrayRef for Data in InputSectionData.Rafael Espindola5-36/+34
llvm-svn: 281210
2016-09-12Revert "Revert "Compact InputSectionData from 64 to 48 bytes. NFC.""Rafael Espindola2-5/+9
This reverts commit r281096. The previous link errors should be fixed by r281208. llvm-svn: 281209
2016-09-12Define a dummy zlib::uncompress when zlib is not available.Rafael Espindola1-0/+4
Should fix link errors in some bots when it is used. llvm-svn: 281208
2016-09-12GlobalISel: support translation of global addresses.Tim Northover6-0/+63
llvm-svn: 281207
2016-09-12[clang-tidy] readability-misplaced-array-index: add new check that warns ↵Daniel Marjamaki8-0/+164
when array index is misplaced. Reviewers: alexfh Differential Revision: https://reviews.llvm.org/D21134 llvm-svn: 281206
2016-09-12GlobalISel: translate GEP instructions.Tim Northover7-1/+216
Unlike SDag, we use a separate G_GEP instruction (much simplified, only taking a single byte offset) to preserve the pointer type information through selection. llvm-svn: 281205
2016-09-12GlobalISel: disambiguate types when printing MIRTim Northover13-102/+139
Some generic instructions have multiple types. While in theory these always be discovered by inspecting the single definition of each generic vreg, in practice those definitions won't always be local and traipsing through a big function to find them will not be fun. So this changes MIRPrinter to print out the type of uses as well as defs, if they're known to be different or not known to be the same. On the parsing side, we're a little more flexible: provided each register is given a type in at least one place it's mentioned (and all types are consistent) we accept the MIR. This doesn't introduce ambiguity but makes writing tests manually a bit less painful. llvm-svn: 281204
2016-09-12clang-format: Make emacs integration work with narrowed buffers.Daniel Jasper1-1/+1
Use (call-process region nil ...) instead of (point-min) so that the call works in narrowed buffers. Patch by Philipp Stephani, thank you! llvm-svn: 281203
2016-09-12[ELF/AArch64] Implement some UABS relocsEugene Leviant3-1/+35
Differential revision: https://reviews.llvm.org/D24403 llvm-svn: 281202
2016-09-12Fix WebAssembly broken build related to interface change in r281172.Eric Liu1-2/+1
Reviewers: bkramer Subscribers: jfb, llvm-commits, dschuff Differential Revision: https://reviews.llvm.org/D24449 llvm-svn: 281201
2016-09-12[CFG] Add iterator_ranges to CFG and CFGBlock.Martin Bohme1-0/+25
Summary: (Needed for D23353.) Reviewers: alexfh Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D23842 llvm-svn: 281200
2016-09-12Add MiSyntaxTestCase.test_lldbmi_output_grammar test (MI)Ilia K2-3/+101
Summary: This patch adds a new test and fixes extra new-line before exit Reviewers: abidh Subscribers: ki.stfu, dawn, lldb-commits, abidh Differential Revision: https://reviews.llvm.org/D9740 llvm-svn: 281199
2016-09-12Add virtual destructor (necessary due to the switch to shared_ptr).Richard Smith1-0/+1
llvm-svn: 281198
2016-09-12Attempt #3 to placate MSVC.Richard Smith1-4/+6
llvm-svn: 281197
2016-09-12AVX-512: Added a test case that should be optimized in the future. NFC.Elena Demikhovsky1-13/+48
llvm-svn: 281196
2016-09-12Attempt #2 to placate MSVCRichard Smith1-0/+2
llvm-svn: 281195
2016-09-12Attempt to placate MSVC.Richard Smith1-1/+3
llvm-svn: 281194
2016-09-12GPGPU: Bail out gracefully in case of invalid IRTobias Grosser2-4/+91
Instead of aborting, we now bail out gracefully in case the kernel IR we generate is invalid. This can currently happen in case the SCoP stores pointer values, which we model as arrays, as data values into other arrays. In this case, the original pointer value is not available on the device and can consequently not be stored. As detecting this ahead of time is not so easy, we detect these situations after the invalid IR has been generated and bail out. llvm-svn: 281193
2016-09-12Add a mode to clang-tblgen to generate reference documentation for warning andRichard Smith10-4/+11061
remark flags. For now I'm checking in a copy of the built documentation, but we can replace this with a placeholder (as we do for the attributes reference documentation) once we enable building this server-side. llvm-svn: 281192
2016-09-12Fix about a dozen compile warningsIlia K8-23/+25
Summary: It fixes the following compile warnings: 1. '0' flag ignored with precision and ‘%d’ gnu_printf format 2. enumeral and non-enumeral type in conditional expression 3. format ‘%d’ expects argument of type ‘int’, but argument 4 has type ... 4. enumeration value ‘...’ not handled in switch 5. cast from type ‘const uint64_t* {aka ...}’ to type ‘int64_t* {aka ...}’ casts away qualifiers 6. extra ‘;’ 7. comparison between signed and unsigned integer expressions 8. variable ‘register_operand’ set but not used 9. control reaches end of non-void function Reviewers: jingham, emaste, zturner, clayborg Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D24331 llvm-svn: 281191
2016-09-12llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll REQUIRES +Asserts.NAKAMURA Takumi1-0/+1
This might not *crash* with -Asserts. I saw it caused infinite loop in the codegen. llvm-svn: 281190
2016-09-12[MS ABI] Add /include directives for dynamic TLSDavid Majnemer2-0/+13
MSVC emits /include directives in the .drective section for the __dyn_tls_init function (decorated as ___dyn_tls_init@12 for 32-bit). This fixes PR30347. llvm-svn: 281189
2016-09-12MC: Move MCSection::begin/end to header, NFCDuncan P. N. Exon Smith2-24/+8
llvm-svn: 281188
2016-09-12[InstCombine] add helper function for folding {and,or,xor} (cast X), C ; NFCISanjay Patel1-28/+41
llvm-svn: 281187
2016-09-12[InstCombine] regenerate checksSanjay Patel1-52/+55
llvm-svn: 281186
generated by cgit v1.1 at 2025-10-17 20:32:27 +0000