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3 hours[Clang] Fixes builtin_bswapg builtin for bool type (#179177)HEADmainworuyu9-8/+25
3 hours[ExpandIRInsts] Freeze value before fptoi expansion (#179659)Nikita Popov4-20/+81
3 hours[perf] Replace copy-assign by move-assign in llvm/lib/Target (#179464)serge-sans-paille2-3/+3
4 hours[clang][bytecode] Remove an incorrect assertion (#179644)Timm Baeder2-3/+6
4 hours[flang] fix early free of allocatable function result in WHERE mask (#178691)jeanPerier5-84/+113
4 hours[clang][bytecode] Reject void ArraySubscriptExprs (#179619)Timm Baeder2-0/+7
4 hours[flang][OpenMP] Leave local automatic variables alone (#178739)Krzysztof Parzyszek2-24/+144
4 hours[clang][bytecode] Handle a null record better (#179645)Timm Baeder2-0/+10
4 hours[AMDGPU] Add machineFunctionInfo to recent MIR tests (#179602)Carl Ritson2-3/+4
4 hours[clang-tidy] Allow type-generic builtins in pro-type-vararg check (#178656)puneeth_aditya_56563-0/+22
4 hours[clang][bytecode] Reject invalid CXXNewExprs (#179629)Timm Baeder2-0/+5
5 hours[LowerMemIntrinsics] Optimize memset lowering (#169040)Fabian Ritter18-325/+4898
5 hours[CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (#179634)Jay Foad1-25/+13
5 hours[X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (#179630)Simon Pilgrim4-7/+16
6 hours[clang][bytecode] Don't call getOffset on non-block pointers (#179628)Timm Baeder2-2/+10
6 hours[mlir][spirv] Update op examples that diverged from assemblyFormat. NFC. (#17...Jakub Kuderski7-27/+27
6 hours[AArch64] Fix a couple of typos (NFC) (#179639)Benjamin Maxwell1-7/+7
6 hours[X86][NFC] Split mapxf options from mapx_features (#179638)Phoebe Wang1-21/+20
6 hours[NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (#179632)Juan Manuel Martinez Caamaño8-627/+615
6 hours[AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (#1...Abhinav Garg2-1/+36
6 hours[AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (#179493)idubinov1-0/+4
6 hours[X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177...Shamshura Egor2-1/+62
7 hoursAMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (#179441)Petar Avramovic2-7/+9
7 hours[NFC] Add redirect the output (#179623)GkvJwa1-3/+3
7 hours[X86] Fold vgf2p8affineqb XOR with splat constant into immediate (#179103)bala-bhargav3-0/+235
7 hours[HEXAGON] Extend/Truncate the shift amount into i32 (#179499)Abinaya Saravanan2-2/+35
7 hours[AArch64] Add clmul AArch64 lowering tests (#179495)Matthew Devereau3-16/+2084
8 hours[libc++] Simplify the implementation of __{un,re}wrap_range (#178381)Nikolas Klauser1-43/+13
8 hours[mlir][tosa]: Add MIN_SHAPE, MAX_SHAPE Ops folders (#179488)Udaya Ranga3-7/+68
8 hours[libc++] Avoid template instantiations in the duration aliases (#178182)Nikolas Klauser1-6/+6
8 hours[PowerPC] Only set QualName symbol on first section switch (#179253)Nikita Popov2-2/+34
8 hours[X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (#118012)Simon Pilgrim3-496/+208
8 hours[SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (#144...jeanPerier1-1/+5
9 hours[clang][bytecode][NFC] Add Pointer::canDeref (#179618)Timm Baeder3-6/+12
9 hours[NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (#179501)Juan Manuel Martinez Caamaño13-221/+243
9 hours[SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional op...Juan Manuel Martinez Caamaño3-14/+16
10 hours[MLIR][Python] Ignore the returned status of `loadDialectModule` in lookup fu...Twice1-6/+4
10 hours[LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (#1...Luke Lau1-3/+6
10 hours[RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality. NFC (#179479)Luke Lau1-2/+1
10 hours[clang][bytecode] Fix crash when dereferencing cast to larger type (#179030)puneeth_aditya_56562-0/+9
10 hours[RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (#179565)Craig Topper1-3/+8
11 hours[perf] Replace extra copy-assign by move-assign in llvm/lib/ (#179465)serge-sans-paille2-4/+2
11 hours[perf] Replace copy-assign by move-assign in llvm/tools/ (#179463)serge-sans-paille1-1/+1
11 hours[RISCV] Add macro fusion support for spacemit-x100 (#178594)Mark Zhuang9-1/+610
11 hours[RISCV] Run VLOptimizer right after ISel (#179377)Min-Yih Hsu79-414/+433
11 hours[InstCombine] Bubble splices of binop operands to their result (#179432)Luke Lau2-0/+172
11 hours[AMDGPU][NPM] Add target-specific register allocation options (#178889)Teja Alaghari3-32/+168
11 hours[RISCV] Enable SelectCompressOpt with HasStdExtZca. (#179601)Craig Topper3-4/+4
12 hours[LLVM] Remove 'libclc' from ALL projects (#179485)Joseph Huber1-2/+2
13 hours[ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (#179089)Fangrui Song5-127/+211
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