diff options
Diffstat (limited to 'llvm/utils/TableGen/Common')
| -rw-r--r-- | llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp | 13 | ||||
| -rw-r--r-- | llvm/utils/TableGen/Common/InstructionEncoding.cpp | 3 |
2 files changed, 1 insertions, 15 deletions
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp index af75e44..ea4cc27 100644 --- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp @@ -1824,10 +1824,6 @@ bool TreePatternNode::UpdateNodeTypeFromInst(unsigned ResNo, return UpdateNodeType(ResNo, getValueTypeByHwMode(R, T.getHwModes()), TP); } - // PointerLikeRegClass has a type that is determined at runtime. - if (Operand->isSubClassOf("PointerLikeRegClass")) - return UpdateNodeType(ResNo, MVT::iPTR, TP); - // Both RegisterClass and RegisterOperand operands derive their types from a // register class def. const Record *RC = nullptr; @@ -2406,12 +2402,6 @@ static TypeSetByHwMode getImplicitType(const Record *R, unsigned ResNo, const CodeGenHwModes &CGH = CDP.getTargetInfo().getHwModes(); return TypeSetByHwMode(getValueTypeByHwMode(T, CGH)); } - if (R->isSubClassOf("PointerLikeRegClass")) { - assert(ResNo == 0 && "Regclass can only have one result!"); - TypeSetByHwMode VTS(MVT::iPTR); - TP.getInfer().expandOverloads(VTS); - return VTS; - } if (R->getName() == "node" || R->getName() == "srcvalue" || R->getName() == "zero_reg" || R->getName() == "immAllOnesV" || @@ -3612,8 +3602,7 @@ void CodeGenDAGPatterns::FindPatternInputsAndOutputs( if (Val->getDef()->isSubClassOf("RegisterClassLike") || Val->getDef()->isSubClassOf("ValueType") || - Val->getDef()->isSubClassOf("RegisterOperand") || - Val->getDef()->isSubClassOf("PointerLikeRegClass")) { + Val->getDef()->isSubClassOf("RegisterOperand")) { if (Dest->getName().empty()) I.error("set destination must have a name!"); if (!InstResults.insert_or_assign(Dest->getName(), Dest).second) diff --git a/llvm/utils/TableGen/Common/InstructionEncoding.cpp b/llvm/utils/TableGen/Common/InstructionEncoding.cpp index c6c006b..0a163fe 100644 --- a/llvm/utils/TableGen/Common/InstructionEncoding.cpp +++ b/llvm/utils/TableGen/Common/InstructionEncoding.cpp @@ -36,9 +36,6 @@ InstructionEncoding::findOperandDecoderMethod(const CodeGenTarget &Target, Decoder = "Decode" + Record->getName().str() + "RegisterClass"; } else if (Record->isSubClassOf("RegClassByHwMode")) { Decoder = "Decode" + Record->getName().str() + "RegClassByHwMode"; - } else if (Record->isSubClassOf("PointerLikeRegClass")) { - Decoder = "DecodePointerLikeRegClass" + - utostr(Record->getValueAsInt("RegClassKind")); } return {Decoder, true}; |