diff options
Diffstat (limited to 'llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp')
-rw-r--r-- | llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp | 47 |
1 files changed, 29 insertions, 18 deletions
diff --git a/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp b/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp index 3be2eae..f5486cf 100644 --- a/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp +++ b/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp @@ -45,6 +45,21 @@ static Register getPrevDefOfRCInMBB(MachineBasicBlock &MBB, return 0; } +static bool shouldNotRemoveInstruction(const TargetInstrInfo &TII, + const MachineInstr &MI) { + if (MI.isTerminator()) + return true; + + // The MIR is almost certainly going to be invalid if frame instructions are + // deleted individually since they need to come in balanced pairs, so don't + // try to delete them. + if (MI.getOpcode() == TII.getCallFrameSetupOpcode() || + MI.getOpcode() == TII.getCallFrameDestroyOpcode()) + return true; + + return false; +} + static void extractInstrFromFunction(Oracle &O, MachineFunction &MF) { MachineDominatorTree MDT; MDT.runOnMachineFunction(MF); @@ -52,17 +67,17 @@ static void extractInstrFromFunction(Oracle &O, MachineFunction &MF) { auto MRI = &MF.getRegInfo(); SetVector<MachineInstr *> ToDelete; - MachineInstr *TopMI = nullptr; + const TargetSubtargetInfo &STI = MF.getSubtarget(); + const TargetInstrInfo *TII = STI.getInstrInfo(); + MachineBasicBlock *EntryMBB = &*MF.begin(); + MachineBasicBlock::iterator EntryInsPt = + EntryMBB->SkipPHIsLabelsAndDebug(EntryMBB->begin()); // Mark MIs for deletion according to some criteria. for (auto &MBB : MF) { for (auto &MI : MBB) { - if (MI.isTerminator()) - continue; - if (MBB.isEntryBlock() && !TopMI) { - TopMI = &MI; + if (shouldNotRemoveInstruction(*TII, MI)) continue; - } if (!O.shouldKeep()) ToDelete.insert(&MI); } @@ -101,19 +116,15 @@ static void extractInstrFromFunction(Oracle &O, MachineFunction &MF) { } } - // If no dominating definition was found then add an implicit one to the - // first instruction in the entry block. - - // FIXME: This should really insert IMPLICIT_DEF or G_IMPLICIT_DEF. We - // need to refine the reduction quality metric from number of serialized - // bytes to continue progressing if we're going to introduce new - // instructions. - if (!NewReg && TopMI) { + // If no dominating definition was found then add an implicit def to the + // top of the entry block. + if (!NewReg) { NewReg = MRI->cloneVirtualRegister(Reg); - TopMI->addOperand(MachineOperand::CreateReg( - NewReg, true /*IsDef*/, true /*IsImp*/, false /*IsKill*/, - MO.isDead(), MO.isUndef(), MO.isEarlyClobber(), MO.getSubReg(), - /*IsDebug*/ false, MO.isInternalRead())); + bool IsGeneric = MRI->getRegClassOrNull(Reg) == nullptr; + unsigned ImpDef = IsGeneric ? TargetOpcode::G_IMPLICIT_DEF + : TargetOpcode::IMPLICIT_DEF; + BuildMI(*EntryMBB, EntryInsPt, DebugLoc(), TII->get(ImpDef)) + .addReg(NewReg, getRegState(MO), MO.getSubReg()); } // Update all uses. |