diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll | 25 |
1 files changed, 8 insertions, 17 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll index 06150e42..7669ae2 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll @@ -51,10 +51,8 @@ define amdgpu_cs_chain void @test_alloca_var_uniform(i32 inreg %count) { ; GFX12-NEXT: s_wait_samplecnt 0x0 ; GFX12-NEXT: s_wait_bvhcnt 0x0 ; GFX12-NEXT: s_wait_kmcnt 0x0 -; GFX12-NEXT: s_lshl_b32 s0, s0, 2 +; GFX12-NEXT: s_lshl2_add_u32 s0, s0, 15 ; GFX12-NEXT: v_mov_b32_e32 v0, 0 -; GFX12-NEXT: s_wait_alu 0xfffe -; GFX12-NEXT: s_add_co_i32 s0, s0, 15 ; GFX12-NEXT: s_mov_b32 s32, 16 ; GFX12-NEXT: s_wait_alu 0xfffe ; GFX12-NEXT: s_and_b32 s0, s0, -16 @@ -69,8 +67,7 @@ define amdgpu_cs_chain void @test_alloca_var_uniform(i32 inreg %count) { ; GFX942-LABEL: test_alloca_var_uniform: ; GFX942: ; %bb.0: ; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX942-NEXT: s_lshl_b32 s0, s0, 2 -; GFX942-NEXT: s_add_i32 s0, s0, 15 +; GFX942-NEXT: s_lshl2_add_u32 s0, s0, 15 ; GFX942-NEXT: s_mov_b32 s32, 16 ; GFX942-NEXT: s_and_b32 s0, s0, -16 ; GFX942-NEXT: v_mov_b32_e32 v0, 0 @@ -211,15 +208,13 @@ define amdgpu_cs_chain void @test_alloca_and_call_var_uniform(i32 inreg %count) ; GFX12-NEXT: s_add_co_u32 s2, s2, foo@gotpcrel32@lo+12 ; GFX12-NEXT: s_wait_alu 0xfffe ; GFX12-NEXT: s_add_co_ci_u32 s3, s3, foo@gotpcrel32@hi+24 -; GFX12-NEXT: s_lshl_b32 s0, s0, 2 +; GFX12-NEXT: s_lshl2_add_u32 s0, s0, 15 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x0 -; GFX12-NEXT: s_add_co_i32 s0, s0, 15 ; GFX12-NEXT: v_mov_b32_e32 v0, 0 ; GFX12-NEXT: s_mov_b32 s32, 16 -; GFX12-NEXT: s_wait_alu 0xfffe ; GFX12-NEXT: s_and_b32 s0, s0, -16 -; GFX12-NEXT: s_mov_b32 s1, s32 ; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s1, s32 ; GFX12-NEXT: s_lshl_b32 s0, s0, 5 ; GFX12-NEXT: scratch_store_b32 off, v0, s1 ; GFX12-NEXT: s_wait_alu 0xfffe @@ -232,8 +227,7 @@ define amdgpu_cs_chain void @test_alloca_and_call_var_uniform(i32 inreg %count) ; GFX942-LABEL: test_alloca_and_call_var_uniform: ; GFX942: ; %bb.0: ; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX942-NEXT: s_lshl_b32 s0, s0, 2 -; GFX942-NEXT: s_add_i32 s0, s0, 15 +; GFX942-NEXT: s_lshl2_add_u32 s0, s0, 15 ; GFX942-NEXT: s_and_b32 s0, s0, -16 ; GFX942-NEXT: s_lshl_b32 s2, s0, 6 ; GFX942-NEXT: s_getpc_b64 s[0:1] @@ -396,14 +390,12 @@ define amdgpu_cs_chain void @test_call_and_alloca_var_uniform(i32 inreg %count) ; GFX12-NEXT: s_add_co_u32 s2, s2, foo@gotpcrel32@lo+12 ; GFX12-NEXT: s_wait_alu 0xfffe ; GFX12-NEXT: s_add_co_ci_u32 s3, s3, foo@gotpcrel32@hi+24 -; GFX12-NEXT: s_lshl_b32 s0, s0, 2 +; GFX12-NEXT: s_lshl2_add_u32 s0, s0, 15 ; GFX12-NEXT: s_load_b64 s[2:3], s[2:3], 0x0 -; GFX12-NEXT: s_add_co_i32 s0, s0, 15 ; GFX12-NEXT: s_mov_b32 s32, 16 -; GFX12-NEXT: s_wait_alu 0xfffe ; GFX12-NEXT: s_and_b32 s0, s0, -16 -; GFX12-NEXT: s_mov_b32 s4, s32 ; GFX12-NEXT: s_wait_alu 0xfffe +; GFX12-NEXT: s_mov_b32 s4, s32 ; GFX12-NEXT: s_lshl_b32 s0, s0, 5 ; GFX12-NEXT: v_mov_b32_e32 v40, 0 ; GFX12-NEXT: s_wait_alu 0xfffe @@ -417,8 +409,7 @@ define amdgpu_cs_chain void @test_call_and_alloca_var_uniform(i32 inreg %count) ; GFX942-LABEL: test_call_and_alloca_var_uniform: ; GFX942: ; %bb.0: ; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX942-NEXT: s_lshl_b32 s0, s0, 2 -; GFX942-NEXT: s_add_i32 s0, s0, 15 +; GFX942-NEXT: s_lshl2_add_u32 s0, s0, 15 ; GFX942-NEXT: s_and_b32 s0, s0, -16 ; GFX942-NEXT: s_lshl_b32 s2, s0, 6 ; GFX942-NEXT: s_getpc_b64 s[0:1] |