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path: root/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
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Diffstat (limited to 'llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp')
-rw-r--r--llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp29
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
index 26f434b..cedaa86 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
@@ -79,6 +79,32 @@ static void generateInstSeqImpl(int64_t Val, const MCSubtargetInfo &STI,
}
}
+ if (STI.hasFeature(RISCV::FeatureStdExtP)) {
+ // Check if the immediate is packed i8 or i10
+ int32_t Bit63To32 = Val >> 32;
+ int32_t Bit31To0 = Val;
+ int16_t Bit31To16 = Bit31To0 >> 16;
+ int16_t Bit15To0 = Bit31To0;
+ int8_t Bit15To8 = Bit15To0 >> 8;
+ int8_t Bit7To0 = Bit15To0;
+ if (Bit63To32 == Bit31To0) {
+ if (IsRV64 && isInt<10>(Bit63To32)) {
+ Res.emplace_back(RISCV::PLI_W, Bit63To32);
+ return;
+ }
+ if (Bit31To16 == Bit15To0) {
+ if (isInt<10>(Bit31To16)) {
+ Res.emplace_back(RISCV::PLI_H, Bit31To16);
+ return;
+ }
+ if (Bit15To8 == Bit7To0) {
+ Res.emplace_back(RISCV::PLI_B, Bit15To8);
+ return;
+ }
+ }
+ }
+ }
+
if (isInt<32>(Val)) {
// Depending on the active bits in the immediate Value v, the following
// instruction sequences are emitted:
@@ -562,6 +588,9 @@ OpndKind Inst::getOpndKind() const {
case RISCV::LUI:
case RISCV::QC_LI:
case RISCV::QC_E_LI:
+ case RISCV::PLI_B:
+ case RISCV::PLI_H:
+ case RISCV::PLI_W:
return RISCVMatInt::Imm;
case RISCV::ADD_UW:
return RISCVMatInt::RegX0;