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Diffstat (limited to 'llvm/docs/ReleaseNotes.md')
| -rw-r--r-- | llvm/docs/ReleaseNotes.md | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index 5999f78..3463dc8 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -198,6 +198,7 @@ Changes to the RISC-V Backend * `-mcpu=syntacore-scr7` was added. * `-mcpu=tt-ascalon-d8` was added. * `-mcpu=mips-p8700` was added. +* `-mcpu=sifive-p550` was added. * The `Zacas` extension is no longer marked as experimental. * Added Smdbltrp, Ssdbltrp extensions to -march. * The `Smmpm`, `Smnpm`, `Ssnpm`, `Supm`, and `Sspm` pointer masking extensions @@ -224,10 +225,17 @@ Changes to the RISC-V Backend extension. * Adds experimental assembler support for the Qualcomm uC 'Xqcia` (Arithmetic) extension. +* Adds experimental assembler support for the Qualcomm uC 'Xqciac` (Load-Store Address Calculation) + extension. * Adds experimental assembler support for the Qualcomm uC 'Xqcics` (Conditonal Select) extension. * Adds experimental assembler support for the Qualcomm uC 'Xqcilsm` (Load Store Multiple) extension. +* Adds experimental assembler support for the Qualcomm uC 'Xqcicli` (Conditional Load Immediate) + extension. +* Adds experimental assembler support for the Qualcomm uC 'Xqcicm` (Conditonal Move) + extension. +* Added ``Sdext`` and ``Sdtrig`` extensions. Changes to the WebAssembly Backend ---------------------------------- |