diff options
Diffstat (limited to 'clang/test')
-rw-r--r-- | clang/test/CodeGen/X86/avx-cxx-record.cpp | 23 | ||||
-rw-r--r-- | clang/test/CodeGen/target-data.c | 4 | ||||
-rw-r--r-- | clang/test/CodeGenCXX/attr-annotate2.cpp | 10 | ||||
-rw-r--r-- | clang/test/Preprocessor/arm-target-features.c | 14 | ||||
-rw-r--r-- | clang/test/SemaCXX/attr-annotate.cpp | 4 | ||||
-rw-r--r-- | clang/test/TableGen/target-builtins-prototype-parser.td | 18 |
6 files changed, 62 insertions, 11 deletions
diff --git a/clang/test/CodeGen/X86/avx-cxx-record.cpp b/clang/test/CodeGen/X86/avx-cxx-record.cpp new file mode 100644 index 0000000..d8863ca --- /dev/null +++ b/clang/test/CodeGen/X86/avx-cxx-record.cpp @@ -0,0 +1,23 @@ +// RUN: %clang %s -S --target=x86_64-unknown-linux-gnu -emit-llvm -O2 -march=x86-64-v3 -o - | FileCheck %s + +using UInt64x2 = unsigned long long __attribute__((__vector_size__(16), may_alias)); + +template<int id> +struct XMM1 { + UInt64x2 x; +}; + +struct XMM2 : XMM1<0>, XMM1<1> { +}; + +// CHECK: define{{.*}} @_Z3foov({{.*}} [[ARG:%.*]]){{.*}} +// CHECK-NEXT: entry: +// CHECK-NEXT: store {{.*}}, ptr [[ARG]]{{.*}} +// CHECK-NEXT: [[TMP1:%.*]] = getelementptr {{.*}}, ptr [[ARG]]{{.*}} +// CHECK-NEXT: store {{.*}}, ptr [[TMP1]]{{.*}} +XMM2 foo() { + XMM2 result; + ((XMM1<0>*)&result)->x = UInt64x2{1, 2}; + ((XMM1<1>*)&result)->x = UInt64x2{3, 4}; + return result; +} diff --git a/clang/test/CodeGen/target-data.c b/clang/test/CodeGen/target-data.c index 71eb849..fe29aad 100644 --- a/clang/test/CodeGen/target-data.c +++ b/clang/test/CodeGen/target-data.c @@ -160,11 +160,11 @@ // RUN: %clang_cc1 -triple nvptx-unknown -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=NVPTX -// NVPTX: target datalayout = "e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64" +// NVPTX: target datalayout = "e-p:32:32-p6:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64" // RUN: %clang_cc1 -triple nvptx64-unknown -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=NVPTX64 -// NVPTX64: target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64" +// NVPTX64: target datalayout = "e-p6:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64" // RUN: %clang_cc1 -triple r600-unknown -o - -emit-llvm %s | \ // RUN: FileCheck %s -check-prefix=R600 diff --git a/clang/test/CodeGenCXX/attr-annotate2.cpp b/clang/test/CodeGenCXX/attr-annotate2.cpp index 1c9c39c..0b57af1 100644 --- a/clang/test/CodeGenCXX/attr-annotate2.cpp +++ b/clang/test/CodeGenCXX/attr-annotate2.cpp @@ -4,18 +4,28 @@ // CHECK: @[[STR:.*]] = private unnamed_addr constant [45 x i8] c"_Generic selection expression should be fine\00", section "llvm.metadata" // CHECK-NEXT: @[[FILENAME:.*]] = private unnamed_addr constant {{.*}}, section "llvm.metadata" // CHECK-NEXT: @[[ARGS:.*]] = private unnamed_addr constant { i32 } zeroinitializer, section "llvm.metadata" +// CHECK-NEXT: @[[STR2:.*]] = private unnamed_addr constant [14 x i8] c"void is undef\00", section "llvm.metadata" +// CHECK-NEXT: @[[ARGS3:.*]] = private unnamed_addr constant { i8, i8, i32 } { i8 undef, i8 undef, i32 7 }, section "llvm.metadata" + + // CHECK-LABEL: @_Z1fv( // CHECK-NEXT: entry: // CHECK-NEXT: [[N:%.*]] = alloca i32, align 4 // CHECK-NEXT: [[J:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[K:%.*]] = alloca i32, align 4 // CHECK-NEXT: store i32 10, ptr [[N]], align 4 // CHECK-NEXT: call void @llvm.var.annotation.p0.p0(ptr [[J]], ptr @[[STR]], ptr @[[FILENAME]], i32 {{.*}}, ptr @[[ARGS]]) // CHECK-NEXT: store i32 0, ptr [[J]], align 4 +// CHECK-NEXT: call void @llvm.var.annotation.p0.p0(ptr [[K]], ptr @[[STR2]], ptr @[[FILENAME]], i32 {{.*}}, ptr @[[ARGS3]]) +// CHECK-NEXT: store i32 0, ptr [[K]], align 4 // CHECK-NEXT: ret void // void f() { int n = 10; [[clang::annotate("_Generic selection expression should be fine", _Generic(n, int : 0, default : 1))]] int j = 0; // second arg should resolve to 0 fine + + [[clang::annotate("void is undef", (void)2, (void)4, 7)]] + int k = 0; } diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c index ecf9d7e..94dcfc2 100644 --- a/clang/test/Preprocessor/arm-target-features.c +++ b/clang/test/Preprocessor/arm-target-features.c @@ -1013,3 +1013,17 @@ // CHECK-MVE1_2: #define __ARM_FEATURE_MVE 1 // RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-MVE3 %s // CHECK-MVE3: #define __ARM_FEATURE_MVE 3 + +// Cortex-R52 and Cortex-R52Plus correctly enable the `fpv5-sp-d16` FPU when compiling for the SP only version of the CPU. +// RUN: %clang -target arm-none-eabi -mcpu=cortex-r52+nosimd+nofp.dp -mfloat-abi=hard -x c -E -dM -o - %s | FileCheck -check-prefix=CHECK-R52 %s +// RUN: %clang -target arm-none-eabi -mcpu=cortex-r52plus+nosimd+nofp.dp -mfloat-abi=hard -x c -E -dM -o - %s | FileCheck -check-prefix=CHECK-R52 %s +// RUN: %clang -target arm-none-eabi -mcpu=cortex-r52+nofp.dp -mfloat-abi=hard -x c -E -dM -o - %s | FileCheck -check-prefix=CHECK-R52 %s +// RUN: %clang -target arm-none-eabi -mcpu=cortex-r52plus+nofp.dp -mfloat-abi=hard -x c -E -dM -o - %s | FileCheck -check-prefix=CHECK-R52 %s +// CHECK-R52: #define __ARM_FEATURE_FMA 1 +// CHECK-R52: #define __ARM_FP 0x6 +// CHECK-R52: #define __ARM_FPV5__ 1 +// CHECK-R52: #define __ARM_VFPV2__ 1 +// CHECK-R52-NEXT: #define __ARM_VFPV3__ 1 +// CHECK-R52-NEXT: #define __ARM_VFPV4__ 1 +// CHECK-R52-NOT: #define __ARM_NEON 1 +// CHECK-R52-NOT: #define __ARM_NEON__ diff --git a/clang/test/SemaCXX/attr-annotate.cpp b/clang/test/SemaCXX/attr-annotate.cpp index 846ef41..ff538fe 100644 --- a/clang/test/SemaCXX/attr-annotate.cpp +++ b/clang/test/SemaCXX/attr-annotate.cpp @@ -134,3 +134,7 @@ constexpr int foldable_but_invalid() { template <typename T> [[clang::annotate()]] void f2() {} // expected-error@-1 {{'annotate' attribute takes at least 1 argument}} } + +namespace test5 { + void bir [[clang::annotate("B", (void)1)]] (); +} diff --git a/clang/test/TableGen/target-builtins-prototype-parser.td b/clang/test/TableGen/target-builtins-prototype-parser.td index a753f90..451f1a1 100644 --- a/clang/test/TableGen/target-builtins-prototype-parser.td +++ b/clang/test/TableGen/target-builtins-prototype-parser.td @@ -10,55 +10,55 @@ include "clang/Basic/BuiltinsBase.td" def : Builtin { -// CHECK: BUILTIN(__builtin_01, "E8idE4b", "") +// CHECK: Builtin::Info{{.*}} __builtin_01 {{.*}} /* E8idE4b */ let Prototype = "_ExtVector<8,int>(double, _ExtVector<4, bool>)"; let Spellings = ["__builtin_01"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_02, "E8UiE4s", "") +// CHECK: Builtin::Info{{.*}} __builtin_02 {{.*}} /* E8UiE4s */ let Prototype = "_ExtVector<8,unsigned int>(_ExtVector<4, short>)"; let Spellings = ["__builtin_02"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_03, "di", "") +// CHECK: Builtin::Info{{.*}} __builtin_03 {{.*}} /* di */ let Prototype = "double(int)"; let Spellings = ["__builtin_03"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_04, "diIUi", "") +// CHECK: Builtin::Info{{.*}} __builtin_04 {{.*}} /* diIUi */ let Prototype = "double(int, _Constant unsigned int)"; let Spellings = ["__builtin_04"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_05, "v&v&", "") +// CHECK: Builtin::Info{{.*}} __builtin_05 {{.*}} /* v&v& */ let Prototype = "void&(void&)"; let Spellings = ["__builtin_05"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_06, "v*v*cC*.", "") +// CHECK: Builtin::Info{{.*}} __builtin_06 {{.*}} /* v*v*cC*. */ let Prototype = "void*(void*, char const*, ...)"; let Spellings = ["__builtin_06"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_07, "E8iE4dE4b.", "") +// CHECK: Builtin::Info{{.*}} __builtin_07 {{.*}} /* E8iE4dE4b. */ let Prototype = "_ExtVector<8, int>(_ExtVector<4,double>, _ExtVector<4, bool>, ...)"; let Spellings = ["__builtin_07"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_08, "di*R", "") +// CHECK: Builtin::Info{{.*}} __builtin_08 {{.*}} /* di*R */ let Prototype = "double(int * restrict)"; let Spellings = ["__builtin_08"]; } def : Builtin { -// CHECK: BUILTIN(__builtin_09, "V2yy", "") +// CHECK: Builtin::Info{{.*}} __builtin_09 {{.*}} /* V2yy */ let Prototype = "_Vector<2, __bf16>(__bf16)"; let Spellings = ["__builtin_09"]; } |