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-rw-r--r--clang/lib/Basic/OpenMPKinds.cpp19
-rw-r--r--clang/lib/Basic/SourceManager.cpp3
-rw-r--r--clang/lib/Basic/Targets/AMDGPU.cpp6
-rw-r--r--clang/lib/Basic/Targets/AVR.cpp34
-rw-r--r--clang/lib/Basic/Targets/BPF.cpp1
-rw-r--r--clang/lib/Basic/Targets/NVPTX.cpp2
-rw-r--r--clang/lib/Basic/Targets/PPC.h52
-rw-r--r--clang/lib/Basic/Targets/X86.cpp6
-rw-r--r--clang/lib/Basic/Targets/X86.h1
9 files changed, 70 insertions, 54 deletions
diff --git a/clang/lib/Basic/OpenMPKinds.cpp b/clang/lib/Basic/OpenMPKinds.cpp
index 64b2bff..3d41f2d 100644
--- a/clang/lib/Basic/OpenMPKinds.cpp
+++ b/clang/lib/Basic/OpenMPKinds.cpp
@@ -210,6 +210,15 @@ unsigned clang::getOpenMPSimpleClauseType(OpenMPClauseKind Kind, StringRef Str,
#define OPENMP_ALLOCATE_MODIFIER(Name) .Case(#Name, OMPC_ALLOCATE_##Name)
#include "clang/Basic/OpenMPKinds.def"
.Default(OMPC_ALLOCATE_unknown);
+ case OMPC_threadset: {
+ unsigned Type = llvm::StringSwitch<unsigned>(Str)
+#define OPENMP_THREADSET_KIND(Name) .Case(#Name, OMPC_THREADSET_##Name)
+#include "clang/Basic/OpenMPKinds.def"
+ .Default(OMPC_THREADSET_unknown);
+ if (LangOpts.OpenMP < 60)
+ return OMPC_THREADSET_unknown;
+ return Type;
+ }
case OMPC_num_threads: {
unsigned Type = llvm::StringSwitch<unsigned>(Str)
#define OPENMP_NUMTHREADS_MODIFIER(Name) .Case(#Name, OMPC_NUMTHREADS_##Name)
@@ -565,6 +574,16 @@ const char *clang::getOpenMPSimpleClauseTypeName(OpenMPClauseKind Kind,
#include "clang/Basic/OpenMPKinds.def"
}
llvm_unreachable("Invalid OpenMP 'num_threads' clause modifier");
+ case OMPC_threadset:
+ switch (Type) {
+ case OMPC_THREADSET_unknown:
+ return "unknown";
+#define OPENMP_THREADSET_KIND(Name) \
+ case OMPC_THREADSET_##Name: \
+ return #Name;
+#include "clang/Basic/OpenMPKinds.def"
+ }
+ llvm_unreachable("Invalid OpenMP 'threadset' clause modifier");
case OMPC_unknown:
case OMPC_threadprivate:
case OMPC_groupprivate:
diff --git a/clang/lib/Basic/SourceManager.cpp b/clang/lib/Basic/SourceManager.cpp
index d8ec837..938c648 100644
--- a/clang/lib/Basic/SourceManager.cpp
+++ b/clang/lib/Basic/SourceManager.cpp
@@ -608,8 +608,7 @@ FileID SourceManager::createFileIDImpl(ContentCache &File, StringRef Filename,
return FileID::get(LoadedID);
}
unsigned FileSize = File.getSize();
- llvm::ErrorOr<bool> NeedConversion =
- llvm::needConversion(Filename.str().c_str());
+ llvm::ErrorOr<bool> NeedConversion = llvm::needConversion(Filename);
if (NeedConversion && *NeedConversion) {
// Buffer size may increase due to potential z/OS EBCDIC to UTF-8
// conversion.
diff --git a/clang/lib/Basic/Targets/AMDGPU.cpp b/clang/lib/Basic/Targets/AMDGPU.cpp
index d4de704..d4d696b 100644
--- a/clang/lib/Basic/Targets/AMDGPU.cpp
+++ b/clang/lib/Basic/Targets/AMDGPU.cpp
@@ -356,12 +356,6 @@ void AMDGPUTargetInfo::getTargetDefines(const LangOptions &Opts,
if (hasFastFMA())
Builder.defineMacro("FP_FAST_FMA");
- Builder.defineMacro("__AMDGCN_WAVEFRONT_SIZE__", Twine(WavefrontSize),
- "compile-time-constant access to the wavefront size will "
- "be removed in a future release");
- Builder.defineMacro("__AMDGCN_WAVEFRONT_SIZE", Twine(WavefrontSize),
- "compile-time-constant access to the wavefront size will "
- "be removed in a future release");
Builder.defineMacro("__AMDGCN_CUMODE__", Twine(CUMode));
}
diff --git a/clang/lib/Basic/Targets/AVR.cpp b/clang/lib/Basic/Targets/AVR.cpp
index 2673669..90b4ac1 100644
--- a/clang/lib/Basic/Targets/AVR.cpp
+++ b/clang/lib/Basic/Targets/AVR.cpp
@@ -30,13 +30,13 @@ struct LLVM_LIBRARY_VISIBILITY MCUInfo {
// NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
static MCUInfo AVRMcus[] = {
- {"avr1", NULL, "1", 0},
+ {"avr1", nullptr, "1", 0},
{"at90s1200", "__AVR_AT90S1200__", "1", 0},
{"attiny11", "__AVR_ATtiny11__", "1", 0},
{"attiny12", "__AVR_ATtiny12__", "1", 0},
{"attiny15", "__AVR_ATtiny15__", "1", 0},
{"attiny28", "__AVR_ATtiny28__", "1", 0},
- {"avr2", NULL, "2", 1},
+ {"avr2", nullptr, "2", 1},
{"at90s2313", "__AVR_AT90S2313__", "2", 1},
{"at90s2323", "__AVR_AT90S2323__", "2", 1},
{"at90s2333", "__AVR_AT90S2333__", "2", 1},
@@ -50,7 +50,7 @@ static MCUInfo AVRMcus[] = {
{"at90s8515", "__AVR_AT90S8515__", "2", 1},
{"at90c8534", "__AVR_AT90c8534__", "2", 1},
{"at90s8535", "__AVR_AT90S8535__", "2", 1},
- {"avr25", NULL, "25", 1},
+ {"avr25", nullptr, "25", 1},
{"ata5272", "__AVR_ATA5272__", "25", 1},
{"ata6616c", "__AVR_ATA6616c__", "25", 1},
{"attiny13", "__AVR_ATtiny13__", "25", 1},
@@ -80,13 +80,13 @@ static MCUInfo AVRMcus[] = {
{"attiny48", "__AVR_ATtiny48__", "25", 1},
{"attiny88", "__AVR_ATtiny88__", "25", 1},
{"attiny828", "__AVR_ATtiny828__", "25", 1},
- {"avr3", NULL, "3", 1},
+ {"avr3", nullptr, "3", 1},
{"at43usb355", "__AVR_AT43USB355__", "3", 1},
{"at76c711", "__AVR_AT76C711__", "3", 1},
- {"avr31", NULL, "31", 1},
+ {"avr31", nullptr, "31", 1},
{"atmega103", "__AVR_ATmega103__", "31", 1},
{"at43usb320", "__AVR_AT43USB320__", "31", 1},
- {"avr35", NULL, "35", 1},
+ {"avr35", nullptr, "35", 1},
{"attiny167", "__AVR_ATtiny167__", "35", 1},
{"at90usb82", "__AVR_AT90USB82__", "35", 1},
{"at90usb162", "__AVR_AT90USB162__", "35", 1},
@@ -97,7 +97,7 @@ static MCUInfo AVRMcus[] = {
{"atmega16u2", "__AVR_ATmega16U2__", "35", 1},
{"atmega32u2", "__AVR_ATmega32U2__", "35", 1},
{"attiny1634", "__AVR_ATtiny1634__", "35", 1},
- {"avr4", NULL, "4", 1},
+ {"avr4", nullptr, "4", 1},
{"atmega8", "__AVR_ATmega8__", "4", 1},
{"ata6289", "__AVR_ATA6289__", "4", 1},
{"atmega8a", "__AVR_ATmega8A__", "4", 1},
@@ -123,7 +123,7 @@ static MCUInfo AVRMcus[] = {
{"at90pwm3", "__AVR_AT90PWM3__", "4", 1},
{"at90pwm3b", "__AVR_AT90PWM3B__", "4", 1},
{"at90pwm81", "__AVR_AT90PWM81__", "4", 1},
- {"avr5", NULL, "5", 1},
+ {"avr5", nullptr, "5", 1},
{"ata5702m322", "__AVR_ATA5702M322__", "5", 1},
{"ata5782", "__AVR_ATA5782__", "5", 1},
{"ata5790", "__AVR_ATA5790__", "5", 1},
@@ -230,7 +230,7 @@ static MCUInfo AVRMcus[] = {
{"at90scr100", "__AVR_AT90SCR100__", "5", 1},
{"at94k", "__AVR_AT94K__", "5", 1},
{"m3000", "__AVR_AT000__", "5", 1},
- {"avr51", NULL, "51", 2},
+ {"avr51", nullptr, "51", 2},
{"atmega128", "__AVR_ATmega128__", "51", 2},
{"atmega128a", "__AVR_ATmega128A__", "51", 2},
{"atmega1280", "__AVR_ATmega1280__", "51", 2},
@@ -243,12 +243,12 @@ static MCUInfo AVRMcus[] = {
{"at90can128", "__AVR_AT90CAN128__", "51", 2},
{"at90usb1286", "__AVR_AT90USB1286__", "51", 2},
{"at90usb1287", "__AVR_AT90USB1287__", "51", 2},
- {"avr6", NULL, "6", 4},
+ {"avr6", nullptr, "6", 4},
{"atmega2560", "__AVR_ATmega2560__", "6", 4},
{"atmega2561", "__AVR_ATmega2561__", "6", 4},
{"atmega256rfr2", "__AVR_ATmega256RFR2__", "6", 4},
{"atmega2564rfr2", "__AVR_ATmega2564RFR2__", "6", 4},
- {"avrxmega2", NULL, "102", 1},
+ {"avrxmega2", nullptr, "102", 1},
{"atxmega16a4", "__AVR_ATxmega16A4__", "102", 1},
{"atxmega16a4u", "__AVR_ATxmega16A4U__", "102", 1},
{"atxmega16c4", "__AVR_ATxmega16C4__", "102", 1},
@@ -262,7 +262,7 @@ static MCUInfo AVRMcus[] = {
{"atxmega32e5", "__AVR_ATxmega32E5__", "102", 1},
{"atxmega16e5", "__AVR_ATxmega16E5__", "102", 1},
{"atxmega8e5", "__AVR_ATxmega8E5__", "102", 1},
- {"avrxmega4", NULL, "104", 1},
+ {"avrxmega4", nullptr, "104", 1},
{"atxmega64a3", "__AVR_ATxmega64A3__", "104", 1},
{"atxmega64a3u", "__AVR_ATxmega64A3U__", "104", 1},
{"atxmega64a4u", "__AVR_ATxmega64A4U__", "104", 1},
@@ -271,10 +271,10 @@ static MCUInfo AVRMcus[] = {
{"atxmega64c3", "__AVR_ATxmega64C3__", "104", 1},
{"atxmega64d3", "__AVR_ATxmega64D3__", "104", 1},
{"atxmega64d4", "__AVR_ATxmega64D4__", "104", 1},
- {"avrxmega5", NULL, "105", 1},
+ {"avrxmega5", nullptr, "105", 1},
{"atxmega64a1", "__AVR_ATxmega64A1__", "105", 1},
{"atxmega64a1u", "__AVR_ATxmega64A1U__", "105", 1},
- {"avrxmega6", NULL, "106", 6},
+ {"avrxmega6", nullptr, "106", 6},
{"atxmega128a3", "__AVR_ATxmega128A3__", "106", 2},
{"atxmega128a3u", "__AVR_ATxmega128A3U__", "106", 2},
{"atxmega128b1", "__AVR_ATxmega128B1__", "106", 2},
@@ -294,11 +294,11 @@ static MCUInfo AVRMcus[] = {
{"atxmega256d3", "__AVR_ATxmega256D3__", "106", 4},
{"atxmega384c3", "__AVR_ATxmega384C3__", "106", 6},
{"atxmega384d3", "__AVR_ATxmega384D3__", "106", 6},
- {"avrxmega7", NULL, "107", 2},
+ {"avrxmega7", nullptr, "107", 2},
{"atxmega128a1", "__AVR_ATxmega128A1__", "107", 2},
{"atxmega128a1u", "__AVR_ATxmega128A1U__", "107", 2},
{"atxmega128a4u", "__AVR_ATxmega128A4U__", "107", 2},
- {"avrtiny", NULL, "100", 0},
+ {"avrtiny", nullptr, "100", 0},
{"attiny4", "__AVR_ATtiny4__", "100", 0},
{"attiny5", "__AVR_ATtiny5__", "100", 0},
{"attiny9", "__AVR_ATtiny9__", "100", 0},
@@ -307,7 +307,7 @@ static MCUInfo AVRMcus[] = {
{"attiny40", "__AVR_ATtiny40__", "100", 0},
{"attiny102", "__AVR_ATtiny102__", "100", 0},
{"attiny104", "__AVR_ATtiny104__", "100", 0},
- {"avrxmega3", NULL, "103", 1},
+ {"avrxmega3", nullptr, "103", 1},
{"attiny202", "__AVR_ATtiny202__", "103", 1},
{"attiny402", "__AVR_ATtiny402__", "103", 1},
{"attiny204", "__AVR_ATtiny204__", "103", 1},
diff --git a/clang/lib/Basic/Targets/BPF.cpp b/clang/lib/Basic/Targets/BPF.cpp
index 0411bcc..8de1083 100644
--- a/clang/lib/Basic/Targets/BPF.cpp
+++ b/clang/lib/Basic/Targets/BPF.cpp
@@ -75,6 +75,7 @@ void BPFTargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__BPF_FEATURE_GOTOL");
Builder.defineMacro("__BPF_FEATURE_ST");
Builder.defineMacro("__BPF_FEATURE_LOAD_ACQ_STORE_REL");
+ Builder.defineMacro("__BPF_FEATURE_GOTOX");
}
}
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp b/clang/lib/Basic/Targets/NVPTX.cpp
index 9651c38..ec4e40b 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -171,7 +171,7 @@ ArrayRef<const char *> NVPTXTargetInfo::getGCCRegNames() const {
bool NVPTXTargetInfo::hasFeature(StringRef Feature) const {
return llvm::StringSwitch<bool>(Feature)
- .Cases("ptx", "nvptx", true)
+ .Cases({"ptx", "nvptx"}, true)
.Default(false);
}
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index 846b240..d4ada2a 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -125,9 +125,8 @@ public:
.Cases({"power3", "pwr3"}, ArchDefinePpcgr)
.Cases({"power4", "pwr4"},
ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
- .Cases("power5", "pwr5",
- ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr |
- ArchDefinePpcsq)
+ .Cases({"power5", "pwr5"}, ArchDefinePwr5 | ArchDefinePwr4 |
+ ArchDefinePpcgr | ArchDefinePpcsq)
.Cases({"power5x", "pwr5x"},
ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 |
ArchDefinePpcgr | ArchDefinePpcsq)
@@ -166,7 +165,7 @@ public:
ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
- .Cases("8548", "e500", ArchDefineE500)
+ .Cases({"8548", "e500"}, ArchDefineE500)
.Default(ArchDefineNone);
}
return CPUKnown;
@@ -445,27 +444,17 @@ public:
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
IntMaxType = SignedLong;
Int64Type = SignedLong;
- std::string DataLayout;
if (Triple.isOSAIX()) {
// TODO: Set appropriate ABI for AIX platform.
- DataLayout = "E-m:a-Fi64-i64:64-i128:128-n32:64";
LongDoubleWidth = 64;
LongDoubleAlign = DoubleAlign = 32;
LongDoubleFormat = &llvm::APFloat::IEEEdouble();
- } else if ((Triple.getArch() == llvm::Triple::ppc64le)) {
- DataLayout = "e-m:e-Fn32-i64:64-i128:128-n32:64";
+ } else if ((Triple.getArch() == llvm::Triple::ppc64le) ||
+ Triple.isPPC64ELFv2ABI()) {
ABI = "elfv2";
} else {
- DataLayout = "E-m:e";
- if (Triple.isPPC64ELFv2ABI()) {
- ABI = "elfv2";
- DataLayout += "-Fn32";
- } else {
- ABI = "elfv1";
- DataLayout += "-Fi64";
- }
- DataLayout += "-i64:64-i128:128-n32:64";
+ ABI = "elfv1";
}
if (Triple.isOSFreeBSD() || Triple.isOSOpenBSD() || Triple.isMusl()) {
@@ -473,14 +462,12 @@ public:
LongDoubleFormat = &llvm::APFloat::IEEEdouble();
}
- if (Triple.isOSAIX() || Triple.isOSLinux())
- DataLayout += "-S128-v256:256:256-v512:512:512";
- resetDataLayout(DataLayout);
-
// Newer PPC64 instruction sets support atomics up to 16 bytes.
MaxAtomicPromoteWidth = 128;
// Baseline PPC64 supports inlining atomics up to 8 bytes.
MaxAtomicInlineWidth = 64;
+
+ calculateDataLayout();
}
void setMaxAtomicWidth() override {
@@ -495,10 +482,33 @@ public:
return TargetInfo::CharPtrBuiltinVaList;
}
+ void calculateDataLayout() {
+ std::string DataLayout;
+
+ if (getTriple().isOSAIX()) {
+ DataLayout = "E-m:a-Fi64-i64:64-i128:128-n32:64";
+ } else if ((getTriple().getArch() == llvm::Triple::ppc64le)) {
+ DataLayout = "e-m:e-Fn32-i64:64-i128:128-n32:64";
+ } else {
+ DataLayout = "E-m:e";
+ if (ABI == "elfv2") {
+ DataLayout += "-Fn32";
+ } else {
+ DataLayout += "-Fi64";
+ }
+ DataLayout += "-i64:64-i128:128-n32:64";
+ }
+
+ if (getTriple().isOSAIX() || getTriple().isOSLinux())
+ DataLayout += "-S128-v256:256:256-v512:512:512";
+ resetDataLayout(DataLayout);
+ }
+
// PPC64 Linux-specific ABI options.
bool setABI(const std::string &Name) override {
if (Name == "elfv1" || Name == "elfv2") {
ABI = Name;
+ calculateDataLayout();
return true;
}
return false;
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index e71f10c..7a90c89 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -396,8 +396,6 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasAMXFP8 = true;
} else if (Feature == "+amx-movrs") {
HasAMXMOVRS = true;
- } else if (Feature == "+amx-transpose") {
- HasAMXTRANSPOSE = true;
} else if (Feature == "+amx-avx512") {
HasAMXAVX512 = true;
} else if (Feature == "+amx-tf32") {
@@ -925,8 +923,6 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__AMX_FP8__");
if (HasAMXMOVRS)
Builder.defineMacro("__AMX_MOVRS__");
- if (HasAMXTRANSPOSE)
- Builder.defineMacro("__AMX_TRANSPOSE__");
if (HasAMXAVX512)
Builder.defineMacro("__AMX_AVX512__");
if (HasAMXTF32)
@@ -1068,7 +1064,6 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const {
.Case("amx-movrs", true)
.Case("amx-tf32", true)
.Case("amx-tile", true)
- .Case("amx-transpose", true)
.Case("avx", true)
.Case("avx10.1", true)
.Case("avx10.2", true)
@@ -1189,7 +1184,6 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
.Case("amx-movrs", HasAMXMOVRS)
.Case("amx-tf32", HasAMXTF32)
.Case("amx-tile", HasAMXTILE)
- .Case("amx-transpose", HasAMXTRANSPOSE)
.Case("avx", SSELevel >= AVX)
.Case("avx10.1", HasAVX10_1)
.Case("avx10.2", HasAVX10_2)
diff --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h
index be3a473..e7da262 100644
--- a/clang/lib/Basic/Targets/X86.h
+++ b/clang/lib/Basic/Targets/X86.h
@@ -160,7 +160,6 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
bool HasAMXCOMPLEX = false;
bool HasAMXFP8 = false;
bool HasAMXMOVRS = false;
- bool HasAMXTRANSPOSE = false;
bool HasAMXAVX512 = false;
bool HasAMXTF32 = false;
bool HasSERIALIZE = false;
generated by cgit v1.1 at 2025-11-02 10:50:05 +0000