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-rw-r--r--llvm/test/TableGen/ConcatenatedSubregs.td6
-rw-r--r--llvm/utils/TableGen/CodeGenRegisters.cpp12
2 files changed, 11 insertions, 7 deletions
diff --git a/llvm/test/TableGen/ConcatenatedSubregs.td b/llvm/test/TableGen/ConcatenatedSubregs.td
index dc2a298..b67d6b0 100644
--- a/llvm/test/TableGen/ConcatenatedSubregs.td
+++ b/llvm/test/TableGen/ConcatenatedSubregs.td
@@ -13,6 +13,12 @@ class MyClass<int size, list<ValueType> types, dag registers>
let Size = size;
}
+// Register Example:
+// D0_D1 -- D0 (sub0) -- S0 (ssub0)
+// \ \- S1 (ssub1)
+// \ D1 (sub1) -- S2 (ssub2)
+// \- S3 (ssub3)
+
def sub0 : SubRegIndex<32>;
def sub1 : SubRegIndex<32, 32>;
def sub2 : SubRegIndex<32, 64>;
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 5ff1608..425351c 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -122,12 +122,11 @@ LaneBitmask CodeGenSubRegIndex::computeLaneMask() const {
void CodeGenSubRegIndex::setConcatenationOf(
ArrayRef<CodeGenSubRegIndex*> Parts) {
- if (ConcatenationOf.empty()) {
+ if (ConcatenationOf.empty())
ConcatenationOf.assign(Parts.begin(), Parts.end());
- } else {
+ else
assert(std::equal(Parts.begin(), Parts.end(),
ConcatenationOf.begin()) && "parts consistent");
- }
}
void CodeGenSubRegIndex::computeConcatTransitiveClosure() {
@@ -492,16 +491,15 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
SmallVector<CodeGenSubRegIndex*, 8> Parts;
// We know that the first component is (SubRegIdx,SubReg). However we
// may still need to split it into smaller subregister parts.
- assert(Cand->ExplicitSubRegs[0] == SubReg);
- assert(getSubRegIndex(SubReg) == SubRegIdx);
+ assert(Cand->ExplicitSubRegs[0] == SubReg && "LeadingSuperRegs correct");
+ assert(getSubRegIndex(SubReg) == SubRegIdx && "LeadingSuperRegs correct");
for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs) {
if (CodeGenSubRegIndex *SubRegIdx = getSubRegIndex(SubReg)) {
if (SubRegIdx->ConcatenationOf.empty()) {
Parts.push_back(SubRegIdx);
- } else {
+ } else
for (CodeGenSubRegIndex *SubIdx : SubRegIdx->ConcatenationOf)
Parts.push_back(SubIdx);
- }
} else {
// Sub-register doesn't exist.
Parts.clear();