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-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrInfo.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 1e46fe0..38b40ec 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1392,7 +1392,7 @@ public:
return RI.getRegSizeInBits(*getOpRegClass(MI, OpNo)) / 8;
}
- /// Return the number of registers spilled/reloaded by the spill opcode.
+ /// Return the number of registers spilled/reloaded by the spill instruction.
unsigned getNumSubRegsForSpillOp(const MachineInstr &MI) const;
/// Legalize the \p OpIndex operand of this instruction by inserting