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authorMatt Arsenault <Matthew.Arsenault@amd.com>2025-09-09 20:13:52 +0900
committerMatt Arsenault <arsenm2@gmail.com>2025-09-20 08:50:38 +0900
commit9d6a7e1dbf85eecadc522c341e9959122f46b2d3 (patch)
treebed185ccde897e46fbcf253c0b15970e345bdd4c /llvm/utils
parent669b2f8a1951b6b9581c55f8bf539b8d84343b5f (diff)
downloadllvm-users/arsenm/codegen/remove-PointerLikeRegClass.zip
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CodeGen: Remove PointerLikeRegClass handling from codegenusers/arsenm/codegen/remove-PointerLikeRegClass
All uses have been migrated to RegClassByHwMode. This is now an implementation detail of InstrInfoEmitter for pseudoinstructions.
Diffstat (limited to 'llvm/utils')
-rw-r--r--llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp13
-rw-r--r--llvm/utils/TableGen/Common/InstructionEncoding.cpp3
-rw-r--r--llvm/utils/TableGen/DAGISelMatcherGen.cpp1
-rw-r--r--llvm/utils/TableGen/InstrInfoEmitter.cpp6
4 files changed, 2 insertions, 21 deletions
diff --git a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
index af75e44..ea4cc27 100644
--- a/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
@@ -1824,10 +1824,6 @@ bool TreePatternNode::UpdateNodeTypeFromInst(unsigned ResNo,
return UpdateNodeType(ResNo, getValueTypeByHwMode(R, T.getHwModes()), TP);
}
- // PointerLikeRegClass has a type that is determined at runtime.
- if (Operand->isSubClassOf("PointerLikeRegClass"))
- return UpdateNodeType(ResNo, MVT::iPTR, TP);
-
// Both RegisterClass and RegisterOperand operands derive their types from a
// register class def.
const Record *RC = nullptr;
@@ -2406,12 +2402,6 @@ static TypeSetByHwMode getImplicitType(const Record *R, unsigned ResNo,
const CodeGenHwModes &CGH = CDP.getTargetInfo().getHwModes();
return TypeSetByHwMode(getValueTypeByHwMode(T, CGH));
}
- if (R->isSubClassOf("PointerLikeRegClass")) {
- assert(ResNo == 0 && "Regclass can only have one result!");
- TypeSetByHwMode VTS(MVT::iPTR);
- TP.getInfer().expandOverloads(VTS);
- return VTS;
- }
if (R->getName() == "node" || R->getName() == "srcvalue" ||
R->getName() == "zero_reg" || R->getName() == "immAllOnesV" ||
@@ -3612,8 +3602,7 @@ void CodeGenDAGPatterns::FindPatternInputsAndOutputs(
if (Val->getDef()->isSubClassOf("RegisterClassLike") ||
Val->getDef()->isSubClassOf("ValueType") ||
- Val->getDef()->isSubClassOf("RegisterOperand") ||
- Val->getDef()->isSubClassOf("PointerLikeRegClass")) {
+ Val->getDef()->isSubClassOf("RegisterOperand")) {
if (Dest->getName().empty())
I.error("set destination must have a name!");
if (!InstResults.insert_or_assign(Dest->getName(), Dest).second)
diff --git a/llvm/utils/TableGen/Common/InstructionEncoding.cpp b/llvm/utils/TableGen/Common/InstructionEncoding.cpp
index c6c006b..0a163fe 100644
--- a/llvm/utils/TableGen/Common/InstructionEncoding.cpp
+++ b/llvm/utils/TableGen/Common/InstructionEncoding.cpp
@@ -36,9 +36,6 @@ InstructionEncoding::findOperandDecoderMethod(const CodeGenTarget &Target,
Decoder = "Decode" + Record->getName().str() + "RegisterClass";
} else if (Record->isSubClassOf("RegClassByHwMode")) {
Decoder = "Decode" + Record->getName().str() + "RegClassByHwMode";
- } else if (Record->isSubClassOf("PointerLikeRegClass")) {
- Decoder = "DecodePointerLikeRegClass" +
- utostr(Record->getValueAsInt("RegClassKind"));
}
return {Decoder, true};
diff --git a/llvm/utils/TableGen/DAGISelMatcherGen.cpp b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
index d84bfa8..7e06ad7 100644
--- a/llvm/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
@@ -240,7 +240,6 @@ void MatcherGen::EmitLeafMatchCode(const TreePatternNode &N) {
if ( // Handle register references. Nothing to do here, they always match.
LeafRec->isSubClassOf("RegisterClassLike") ||
LeafRec->isSubClassOf("RegisterOperand") ||
- LeafRec->isSubClassOf("PointerLikeRegClass") ||
LeafRec->isSubClassOf("SubRegIndex") ||
// Place holder for SRCVALUE nodes. Nothing to do here.
LeafRec->getName() == "srcvalue")
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 84b4e14..59755d1 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -182,12 +182,8 @@ InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
// Fill in applicable flags.
Res += "0";
- if (OpR->isSubClassOf("RegClassByHwMode")) {
+ if (OpR->isSubClassOf("RegClassByHwMode"))
Res += "|(1<<MCOI::LookupRegClassByHwMode)";
- } else if (OpR->isSubClassOf("PointerLikeRegClass")) {
- // Ptr value whose register class is resolved via callback.
- Res += "|(1<<MCOI::LookupPtrRegClass)";
- }
// Predicate operands. Check to see if the original unexpanded operand
// was of type PredicateOp.