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| author | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2025-09-05 12:15:28 +0000 |
|---|---|---|
| committer | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2025-09-12 11:21:41 +0000 |
| commit | b666a28a0581e3a1f7838eca5f241d2550c05e4b (patch) | |
| tree | 41473d9785a63148661490cb95234d4d6f304258 /llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | |
| parent | 77596b78e5664fff8d272599c0420fc9b87e2c2d (diff) | |
| download | llvm-users/MacDue/sme-loops.zip llvm-users/MacDue/sme-loops.tar.gz llvm-users/MacDue/sme-loops.tar.bz2 | |
[AArch64][SME] Avoid ZA save state changes in loops in MachineSMEABIPassusers/MacDue/sme-loops
This patch uses the MachineLoopInfo to give blocks within loops a higher
weight when choosing the bundle ZA state. MachineLoopInfo does not find
loop trip counts, so this uses an arbitrary weight (default 10), which
can be configured with the `-aarch64-sme-abi-loop-edge-weight` flag.
This makes the MachineSMEABIPass pass more likely to pick a bundle state
that matches the loop's entry/exit state, which avoids state changes in
the loop (which we assume will happen more than once).
This does require some extra analysis, so this is only enabled at -O1
and above.
Change-Id: If318c809d2f7cc1fca144fbe424ba2a2ca7fb19f
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64TargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp index dde1d88..6606a73 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -770,8 +770,8 @@ bool AArch64PassConfig::addGlobalInstructionSelect() { } void AArch64PassConfig::addMachineSSAOptimization() { - if (EnableNewSMEABILowering && TM->getOptLevel() != CodeGenOptLevel::None) - addPass(createMachineSMEABIPass()); + if (TM->getOptLevel() != CodeGenOptLevel::None && EnableNewSMEABILowering) + addPass(createMachineSMEABIPass(TM->getOptLevel())); if (TM->getOptLevel() != CodeGenOptLevel::None && EnableSMEPeepholeOpt) addPass(createSMEPeepholeOptPass()); @@ -804,7 +804,7 @@ bool AArch64PassConfig::addILPOpts() { void AArch64PassConfig::addPreRegAlloc() { if (TM->getOptLevel() == CodeGenOptLevel::None && EnableNewSMEABILowering) - addPass(createMachineSMEABIPass()); + addPass(createMachineSMEABIPass(CodeGenOptLevel::None)); // Change dead register definitions to refer to the zero register. if (TM->getOptLevel() != CodeGenOptLevel::None && |